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Texas Instruments CDCM7005 manual Application Circuit Diagram, Passive Loop Filter

Models: CDCM7005

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Application Circuit Diagram

5.1 Application Circuit Diagram

The following applications sections the two loop filter configurations are discussed.

5.1.1Passive Loop Filter

The passive loop filter is a second order filter (two poles, one zero). The zero is required for the overall loop stability. R1, C1, and C2 generate the dominant pole of the system. A second pole is introduced by R2 and C3.

Figure 5−1. CDCM7005 With a Passive Loop Filter Configuration

				VC(X)O			Low-Pass Filter
				VC(X)O			R2
			491.52 MHz				R2
			491.52 MHz				160 Ω
							160 Ω
			PECL_OUT_B			V_CTRL
			PECL_OUT_B
			PECL_OUT				C3
							C3
							100 nF
			CDCM7005
			PRI_REF
			SEC_REF				R1
							R1
							4.7 kΩ
							C2
					CP_OUT		100 nF
			CTRL_LE		CP_OUT		C1
							C1
							22 ∝F
SPI			CTRL_DATA				22 ∝F
SPI			CTRL_DATA	STATUS_REF
		VCC	CTRL_CLK	STATUS_REF
VCC		VCC	STATUS_VC(X)O
					PLL_LOCK
		130 Ω					10 nF
		130 Ω			YnA
130 Ω					YnA
130 Ω			VC(X)O_IN				10 nF
			VC(X)O_IN				10 nF
			VC(X)O_IN_B		YnB
			VC(X)O_IN_B
R		R			R	R
82	Ω	82	Ω		150 Ω	150	Ω

5-2

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Texas Instruments CDCM7005 manual Application Circuit Diagram, Passive Loop Filter

Contents

HPA/High Speed Communications User’s GuideCDCM7005 QFN Package Evaluation Module Manual 2005IMPORTANT NOTICE ProductsApplications EVM IMPORTANT NOTICE EVM WARNINGS AND RESTRICTIONS How to Use This Manual CDCM7005 Data Sheet, SCAS793, Texas InstrumentsRead This First Preface1 Introduction Contents6 Parts List, Board Layouts, and Schematics 2 Quick StartFigures Tables3−1 Filter Configurations Topic IntroductionChapter Page⎟ ⎟ ⎟ ⎟ ⎟ 6 ⎟ 1.1 CDCM7005 Functional Block DiagramCDCM7005 Functional Block Diagram ⎟ 4 oQuick Start ChapterTopic EVM HardwarePage Chapter3.2.1 Power Supply P1, P2 3.1 Board View and Connector Location3.2 Hardware Configuration 3.2.2 Onboard Switches and Indicators SW1−SW2, D1−D43.2.4 Loop Filter J32−J34 Table 3−1. Filter Configurations3.2.3 Programming Interfaces J30, J31 Default setting Passive Loop Filter3.2.6 VCXO Inputs and Outputs J16−J18 3.2.7 AC-Coupling at PRIREF C1, R4, R6 and SECREF C5, R13, R15Page Serial Peripheral Interface SPI SoftwareChapter Topic4.1 Functional Description 4.2 Software InstallationFollow the steps below in order to install the SPI control software Figure 4−1. Screen ViewChapter Application Circuit DiagramThis chapter discusses the application circuit diagram Topic5.1 Application Circuit Diagram Figure 5−1. CDCM7005 With a Passive Loop Filter Configuration5.1.1 Passive Loop Filter Application Circuit Diagram 5.1.2 External Active Loop Filter Using OPA341Figure 5−2. CDCM7005 With a External Active Loop Filter Using OPA341 Application Circuit DiagramSchematics Parts List, Board Layout, and SchematicsParts List ChapterFootprint Parts ListParts List Part NumberFootprint Parts ListParts List, Board Layout, and Schematics Part NumberPart Number Parts ListFootprint DesignatorParts List 6.2 Board LayoutFigure 6−1. Component View and Silkscreen Top View Parts List, Board Layout, and SchematicsFigure 6−2. Component View and Silkscreen Bottom View Parts ListFigure 6−3. Top Layer View Parts ListParts List, Board Layout, and Schematics Figure 6−4. Bottom Layer View Parts ListFigure 6−5. Ground Plane View Parts ListParts List, Board Layout, and Schematics 6.3 Schematics Figure 6−6. Power Layer ViewParts List 6-11 ve RParts ListParts List, Board Layout, and Schematics ModuleList CDCM7005EVMQFN−SCHCDCM7005QFN Evaluation Module Parts SchematicsPassive Filter Default Setting short pin 1 & 3 on J3 2, J33 PartsListList CDCM7005QFN Evaluation ModuleCDCM7005EVMQFN−SCH A Parts List, Board Layout, and Schematics CDCM7005QFN Evaluation ModuleCDCM7005EVMQFN−SCH