Texas Instruments HPA070 manual Uvlo Circuitry, Inductance Value, Input capacitor selection

SLUU186 − March 2004

4.3UVLO Circuitry

The user programmable UVLO built into the TPS4005x provides hysteresis for transients shorter than a total count of seven cycles. If the input voltage to the converter can be slowly rising around the minimum VIN range, external hysteresis can be incorporated to prevent multiple on/off cycles during startup or shutdown. These on/off cycles are a result of line impedance external to the EVM causing VIN to the module to drop when under load, which causes the programmable UVLO threshold to be crossed repetitively.

In this converter, C1 and D1 are added to form a peak detector from the lower gate drive which is only active when the converter is operating. This provides a bias source to deliver hysteresis current from the peak detector voltage to the lower KFF voltage of 3.5 V, enabling the designer to alter the programmable UVLO shutdown point. The bias is not present during startup, so the circuit starts as expected from the RKFF calculation.

In this application, R4 is selected to provide a hysteresis current of 20% IKFF. R4 can be calculated from equation

(3).

		RKFF	￿VPD	* 3.5￿
RHYS	+ R4 +				(3)
	0.2		￿VIN(min) * 3.5￿

where

DVPD is the voltage on the peak detector

DVIN(min) is the desired start voltage used in the determination of RKFF

In a typical case, VPD = 8V, and R4 is found to be 247 kΩ, and a standard value of 243kΩ is selected. Testing shows the startup voltage to be 9.2 V, and the shutdown voltage to be 8.5 V.

4.4Inductance Value

The output inductor L1 value used in the circuit of Figure 2 was selected from equation (4).

L +	VOUT		1 *	VOUT		(4)
	f I	RIPPLE		V	IN(min)

in which IRIPPLE is usually chosen to be in the range between 10% and 40% of IOUT. With IRIPPLE = 20% of IOUT(max) there is a ripple current of 3 A, and the inductance value is 1.7 µH.

4.5Input capacitor selection

Bulk input capacitor selection is based on allowable input voltage ripple and required RMS current carrying capability. In typical buck converter applications, the converter is fed from an upstream power converter with its own output capacitance. In this converter, ceramic capacitors capable of meeting circuit requirements are provided onboard. For this power level, input voltage ripple of approximately 250 mV is reasonable, and the minimum capacitance is calculated in (5).

CIN +	I	D t	+		I	VO	+		15 A 1.8 V	+ 36 mF
		D V		D V		VIN fS		0.25 V 10 V 300 kHz

Also consider the RMS current rating required for the input capacitors (6).

		VOUT
					1.8
i ^ IOUT	￿D + IOUT ￿			+ 15	￿		+ 6.4 A
			VIN			10

(5)

(6)

To meet this requirement with the smallest cost and size two 22 µF, 16 V, X5R ceramic capacitors (C12, C14) are installed on the board. In the 1812 case, the parts are able to carry approximately 4 ARMS each. These capacitors function as power bypass components and should be located close to the MOSFET packages to keep the high-frequency current flow in a small, tight loop.

TPS40055-Based Design Converts 12-V Bus to 1.8 V at 15 A (HPA070) 7