Register Descriptions
A-7
Register Summary
Interrupt Mask Register (IMR) — Except ’C209 — Data-Memory Address 0004h
15 6 5 4 3 2 1 0
0 0 0 0 0 0 0
ReservedTXRXINT XINT RINT TINT INT2/INT3 HOLD/INT1
R/W
INT2 and INT3 masked
INT2 and INT3 unmasked
0
1Interrupt TXRXINT masked
Interrupt TXRXINT unmasked
0
1Interrupt XINT masked
Interrupt XINT unmasked
0
1Interrupt RINT masked
Interrupt RINT unmasked
0
1Interrupt TINT masked
Interrupt TINT unmasked
0
1
0
1HOLD/INT1 masked
HOLD/INT1 unmasked
R/W R/W R/W R/W R/W
Receive interrupt mask
Transmit interrupt mask
Transmit/receive interrupt mask
HOLD/INT1 mask
Timer interrupt mask
INT2/INT3 mask
These reserved bits are always read as 0s. Writes have no effect.
Interrupt Mask Register (IMR) — ’C209 — Data-Memory Address 0004h
15 4 3 2 1 0
0 0000
ReservedTINT INT3 INT2 INT1
R/W
INT2 masked
INT2 unmasked
0
1Interrupt TINT masked
Interrupt TINT unmasked
0
1INT3 masked
INT3 unmasked
0
1
0
1INT1 masked
INT1 unmasked
R/W R/W R/W
INT1 mask
INT2 mask
INT3 mask
Timer interrupt mask
These reserved bits are always read as 0s. Writes have no effect.