wSecurity Option
This category allows you to limit access to the system setup, or just setup. Default value is Setup
Sy s tem | The | system | will | not boot | and access | to Setup | will | be denied | if | the correct | |
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Setup | The | system | will | boot, but | access | to | setup will | be | denied if | the | password is |
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wPS/2 Mouse Function
Enables or disables PS/2 mouse function. Default is Disabled.
wPCI/VGA Palette Snooping
The purpose of this option is to allow multiple VGA devices on different busses in a system to have data written from CPU to each set of palette registers of every video device. Default is disabled.
wVideo BIOS Shadow
It determines whether Video BIOS will be copied to RAM, however, it is an optional chipset design. Default is Enabled.
4.7 Chipset Features Setup
This screen controls the settings for the board's chip set. The controls for this screen are the same as the previous screen. They should not be changed unless you are familiar with the chipset.
The Chipset Features Screen
ROM ISA BIOS
CHIPSET SETUP UTILITY
AWARD SOFTWARE, INC.
Auto Configuration |
| :Enable |
DRAM Speed Selection |
| :70ns |
DRAM RAS# Precharge Time :4 | ||
MA Additional Wait State | :Enable | |
RAS# to CAS# Delay |
| :Enable |
DRAM Read Burst(B/E/F) |
| :x1/2/3 |
DRAM Write Burst(B/E/F) | :x2/2/3 | |
ISA Bus Clock | :PCICLK/4 | |
DRAM Refresh Queue |
| :Disable |
DRAM RAS# Only Refresh | :Disable | |
ECC Checking/Generation | :Disable | |
Fast DRAM Refresh |
| :Disable |
| :Disable | |
PCI Burst Write Combine |
| :Disable |
PCI to DRAM Pipline |
| :Disable |
CPU to PCI Write Post |
| :Disable |
CPU to PCI IDE Post |
| :Disable |
System Cacheable |
| :Enable |
Video Cacheable |
| :Enabled |
8 bit I/O Recovery Time | :1 |
16 bit I/O Recovery Time | :1 |
Memory Hole at | :Disable |
More Information on these settings can be found at Tyan's web site. http://www.tyan.com
ESC :Quit | :Select Item | |
F1 | :Help | |
F5 | :Old Values | (Shift)F2 :Color |
F6 | :Load BIOS Defaults | |
F7 | :Load Setup Defaults | |
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