Agilent Technologies E4438C manual General Characteristics

Page 32

General Characteristics

Data clock input

The CMOS1 compatible data clock connector

 

accepts an externally supplied data-clock input for

 

digital modulation applications. The expected input is a

 

bit clock signal where the falling edge is used to clock

 

the data and symbol sync signals.

 

The maximum clock rate is 50 MHz. The damage levels

 

are –0.5 to +5.5 V.

 

This female BNC connector is provided on signal

 

generators with Option 601 or 602. On signal generators

 

with Option 1EM, this input is relocated to a rear panel

 

SMB connector.

Data clock output

Relays a CMOS 1 bit clock signal for synchronizing

 

serial data. [Auxiliary I/O connector, rear panel]

Data input

The CMOS1 compatible data connector accepts an

 

externally supplied data input for digital modulation

 

applications. CMOS high is equivalent to a data 1 and

 

a CMOS low is equivalent to a data 0.

 

The maximum data rate is 50 Mb/s. The data must be

 

valid on the data clock falling edges [normal mode] or

 

the symbol sync falling edges [symbol mode]. The

 

damage levels are –0.5 to +5.5 V.

 

This female BNC connector is provided on signal

 

generators with Option 601 or 602. On signal generators

 

with Option 1EM, this input is relocated to a rear panel

 

SMB connector.

Data output

Outputs serial data from the internal data generator or

 

the externally supplied signal at the data input. CMOS 1

 

signal. [Auxiliary I/O connector, rear panel]

Event 1 output

In real-time mode, outputs pattern or frame

 

synchronization pulse for triggering or gating external

 

equipment. May be set to start at the beginning of a

 

pattern, frame, or timeslot and is adjustable to within

 

± one timeslot with one bit resolution.

 

In arbitrary waveform mode, this connector outputs the

 

timing signal generated by marker 1. [BNC, rear panel]

Event 2 output

In real-time mode, outputs data enabled signal for gating

 

external equipment. Applicable when external data is

 

clocked into internally generated timeslots. Data is

 

enabled when signal is low.

 

In arbitrary waveform mode, this connector outputs the

 

timing signal generated by marker 2. [BNC, rear panel]

Event 3 output

In arbitrary waveform mode, this connector outputs the

 

timing signal generated by marker 3. [Auxiliary I/O

 

connector, rear panel]

Event 4 output

In arbitrary waveform mode, this connector outputs the

 

timing signal generated by marker 4. [Auxiliary I/O

 

connector, rear panel]

1. Rear panel inputs and outputs are 3.3 V CMOS, unless indicated otherwise. CMOS inputs will accept 5 V CMOS, 3 V CMOS, or TTL voltage levels.

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Contents Agilent E4438C ESG Vector Signal Generator Table of Contents E4438C ESG Vector signal generator Definitions IntroductionKey Features Key standard features Optional featuresSpecifications for Frequency and Power Characteristics FrequencySweep modes Internal reference oscillator RF reference input requirementsOutput power PowerLevel resolution Level range with Attenuator Hold activeOption ±0.15 dB ±0.25 dB Level switching speedLevel accuracy with ALC on Repeatability and linearity RepeatabilityAmplitude dBm Spectral purity SubharmonicsJitter in µUI1, 7 Jitter in seconds1, 7Characteristic SSB phase noise With Option 1E5Specifications for Analog Modulation ResolutionFM using external inputs 1 or Carrier frequency accuracy relative to CW in DCFM3Specifications for Analog Modulations Phase modulation 1Amplitude modulation 1 StandardWideband AM Pulse modulationInternal modulation source External modulation inputsInput voltage On/off ratio1Rise/fall time1 Minimum burst repetition frequency1Specifications for I/Q Characteristics Modulation bandwidthInputs Input impedance Ω or 600 Ω Full scale inputBaseband outputs AdjustmentsBaseband generator Clock Baseband filtersReconstruction filter fixed Baseband spectral puritySymbol rate Maximum deviation Symbol rateFrame trigger delay control FIR filterInternal burst shape control Specifications for Signal Personality CharacteristicsData types Cdma2000 Spurious emissionsEnhanced multitone1 Software settings Source settings 89641A settingsWlan 802.11a spectral mask typical performanceCustom modulation Real-time modeCustom digitally modulated signals real-time mode 1 Alternate time slot power level control Multiframe output data generationErrors in coded channels Payload bit error count/rate for raw BERContains residual bit errors and bit error count Downlink error reportingGSM/EDGE base station bit error rate test Bert Bit error rate BER analyzer FeaturesClock rate Supported data patternsOperating characteristics Accessories Inputs and outputs Transit caseGeneral Characteristics Panel SMB connectors External 1 inputExternal 2 input Allows communication with compatible devicesOpposite in polarity 180 degrees out of phase Relocated to rear panel SMB connectorsSymbol sync input Falling edge is used to clock the data signalLAN connector With Option UN7With Option File transfer to volatile memoryMating connector RS-232 connectorAuxiliary I/O connector Performance enhancement options Ordering Information1Frequency options E4438C ESG signal generation firmware personalities E4438C ESG Signal Studio software personalitiesRelated Literature Application literaturePage Agilent Open See the ESG Web page for the latest information
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