Intel Core 2, Intel Core2 Duo Processor and Mobile Intel GME965 Express Chipset user manual Lom

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About This Manual

 

Acronym

Definition

 

 

 

 

LOM

LAN on Motherboard

 

 

 

 

LPC

Low Pin Count

 

 

 

 

LS

Low-speed. Refers to USB

 

 

 

 

LVDS

Low Voltage Differential Signaling

 

 

 

 

mBGA

Mini Ball Grid Array

 

 

 

 

MC

Modem Codec

 

 

 

 

MEC

Media Expansion Card

 

 

 

 

MHz

Mega-Hertz

 

 

 

 

OEM

Original Equipment Manufacturer

 

 

 

 

PCIe

PCI Express*

 

 

 

 

PCM

Pulse Code Modulation

 

 

 

 

POST

Power On Self Test

 

 

 

 

PLC

Platform LAN Connect

 

 

 

 

RAID

Redundant Array of Inexpensive Disks

 

 

 

 

RTC

Real Time Clock

 

 

 

 

SATA

Serial ATA

 

 

 

 

SIO

Super Input/Output

 

 

 

 

SKU

StockKeeping Unit

 

 

 

 

SMBus

System Management Bus

 

 

 

 

SODIMM

Small Outline Dual In-line Memory Module

 

 

 

 

SPD

Serial Presence Detect

 

 

 

 

SPI

Serial Peripheral Interface

 

 

 

 

SPWG

Standard Panels Working Group - http://www.spwg.org/

 

 

 

 

SSO

Simultaneous Switching Output

 

 

 

 

STR

Suspend To RAM

 

 

 

 

TCO

Total Cost of Ownership

 

 

 

 

TCP

Transmission Control Protocol

 

 

 

 

TDM

Time Division Multiplexed

 

 

 

 

TDR

Time Domain Reflectometry

 

 

 

 

µBGA

Micro Ball Grid Array

 

 

 

 

UDP

User Datagram Protocol

 

 

 

 

UHCI

Universal Host Controller Interface

 

 

 

 

USB

Universal Serial Bus

 

 

 

 

VGA

Video Graphics Adapter

 

 

 

 

VID

Voltage Identification

 

 

 

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316704-001 / Development Kit User’s Manual

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Contents June 316704-001 / Development Kit User’s Manual Contents Figures TablesDocument Revision Description Revision Date Initial public release JuneContent Overview Text ConventionsText Conventions Notation DefinitionGlossary of Terms and Acronyms Terms and AcronymsTerm/Acronym Definition Experience under all conditions Acronyms Acronym DefinitionBios LOM Support Options Product LiteratureElectronic Support Systems Additional Technical Support Intel Literature CentersRelated Documents Related DocumentsDocument Title Location Development Board Features Development Board feature Set SummaryOverview Development Board Comments ImplementationUSB Software Key Features Included Hardware and DocumentationAMI Bios Before You BeginGetting Started Setting Up the Development Board Configuring the Bios Block Diagram Mechanical Form FactorSystem Features and Operation Thermal ManagementMobile Intel GME965 Gmch System Memory 1.2 DMIAdvanced Graphics and Display Interfaces 2 ICH8-M PCI Express x16 SlotPCI Express* Slots PCI SlotsUSB Connectors On-Board LANHigh Definition Audio 2.5 ATA/ StorageBios Firmware Hub FWH LPC Super I/O SIO/LPC SlotSerial, IrDA 2.10 SPIBios Location Strapping Options System Management Controller SMC/Keyboard ControllerClocks Real Time ClockPower Management States Power Management StatesClock Generation Post Code DebuggerPower Management M-States Description Main Memory StateSubsystem1 Manageability Subsystem2Power Measurement Support Sleep Signals and M-State DefinitionSignal Development Board Voltage Rails Component Voltage Supply Rail Reference LAN +V3.3MLANSW VDDCK505 ATX Primary Features Development Board Component LocationsDevelopment Board Component Location Legend Reference FunctionBack Panel Connectors J8D1TV-Out D-Connector Description Ref DesConfiguration Settings Connector to Component Video CableReference Function Default Setting Optional Setting For each VID signal J7J2 Power On and Reset Buttons NMILEDs Function ReferenceOther Headers, Slots and Sockets 1 H8 Programming HeadersExpansion Slots and Sockets Expansion Slots and SocketsReference Slot/Socket Description Detail Designator 2.1 478 Pin Grid Array Micro-FCPGA Socket PCI ExpressPCI Express* x16 Pinout J6B2 Reference Slot/Socket Description DetailPERST# PRSNT#2 2.3 ADD2/Media Expansion Card MEC Slot ADD2 Slot J6B2End of x1 Connector A19 Reserved B19 SDVOGreen+ A20 A50 Reserved B50 A51 MEC Slot J6B2 SDVOCCLK+ PCI Express* x1 Pinout J6B1, J7B1, J8B4 IDE Connector IDE ConnectorPin Signal Fan Connectors Sata Port 0 ‘Direct Connect’ Connector Pinout J8J1Sata Power Connection J7H2 Sata PinoutFan Connectors J2B3, J2C1 Fan Connector J2F1Front Panel Connector Pin Signal DefinitionUSB Headers J6H3, J6H4 USB HeadersAppendix a . Heatsink Installation Instructions Backplate Pins Applying the Thermal Grease Installing the Heatsink Plugging in the Fan