IBM PC 300GL manual DMA I/O address map

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DMA I/O address map

Table 34. DMA I/O address map

Address (hex)	Description	Bits	Byte pointer

0000	Channel 0, Memory Address register	00–15	Yes

0001	Channel 0, Transfer Count register	00–15	Yes

0002	Channel 1, Memory Address register	00–15	Yes

0003	Channel 1, Transfer Count register	00–15	Yes

0004	Channel 2, Memory Address register	00–15	Yes

0005	Channel 2, Transfer Count register	00–15	Yes

0006	Channel 3, Memory Address register	00–15	Yes

0007	Channel 3, Transfer Count register	00–15	Yes

0008	Channels 0–3, Read Status/Write Command	00–07
	register

0009	Channels 0–3, Write Request register	00–02

000A	Channels 0–3, Write Single Mask register bits	00–02

000B	Channels, 0–3, Mode register (write)	00–07

000C	Channels 0–3, Clear byte pointer (write)	N/A

000D	Channels, 0–3, Master clear (writer)/temp (read)	00–07

000E	Channels 0–3, Clear Mask register (write)	00–03

000F	Channels 0–3, Write All Mask register bits	00–03

0081	Channel 2, Page Table Address register	00–07

0082	Channel 3, Page Table Address register	00–07

0083	Channel 1, Page Table Address register	00–07

0087	Channel 0, Page Table Address register	00–07

0089	Channel 6, Page Table Address register	00–07

008A	Channel 7, Page Table Address register	00–07

008B	Channel 5, Page Table Address register	00–07

008F	Channel 4, Page Table Address/Refresh register	00–07

00C0	Channel 4, Memory Address register	00–15	Yes

00C2	Channel 4, Transfer Count register	00–15	Yes

00C4	Channel 5, Memory Address register	00–15	Yes

00C6	Channel 5, Transfer Count register	00–15	Yes

00C8	Channel 6, Memory Address register	00–15	Yes

00CA	Channel 6, Transfer Count register	00–15	Yes

00CC	Channel 7, Memory Address register	00–15	Yes

50PC 300 GL and 300 PL

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Contents HcchM mlmiM mlni hcc mlml HcchM mlmiM mlni hcc mlml Second Edition March Contents Page Related publications PrefaceTerminology System Overview FeaturesCD-RW Adsl modems Wake on LANWake on Ring PC 300 GL and 300 PL Intel Pentium III microprocessor with MMX technology System board featuresL2 Cache Chip set controlTable . Memory Configuration MB Total Memory Mem O PCI Bus IDE bus master interfaceUSB interface Video Subsystem ROM Video subsystem resources Resource AssignmentRAM IRQAudio Subsystem Integrated peripheral controller Diskette Drive InterfaceSerial ports Keyboard and mouse ports Parallel portReal-time clock and Cmos Network connectionFlash Eeprom Expansion adaptersPhysical layout Ýdimm Rocker switchesLarge rocker switch settings Microprocessor Speed Cable connectors Connector panelSmall rocker switch settings Function 18 PC 300 GL and 300 PL USB 20 PC 300 GL and 300 PL PC 300 GL and PL desktop Physical specificationsHeat output PC300 PL and GL towerAirflow Acoustical noise-emission valuesPhysical specifications 24 PC 300 GL and 300 PL Power input Power supplyPower output Power input requirements Specification MeasurementsSystem board Supply voltage Maximum current Tolerance Component outputsKeyboard port Supply voltage Maximum current Tolerance USB port Supply voltage Maximum current ToleranceConnector description Output protectionVideo port pin Supply voltage Maximum current Tolerance 28 PC 300 GL and 300 PL Plug and Play System softwareAdvanced Power Management APM Configuration/Setup Utility programAdvanced Configuration and Power Interface Acpi Flash update utility programSystem compatibility Hardware compatibilityHardware interrupts Software compatibility Software interruptsMachine-sensitive programs Svga monitor connector Appendix A. Connector pin assignmentsSvga monitor port connector pin assignments Pin Signal DDC2BSystem memory connector DVI-I monitor connectorDQ1 VSS DQ0DQ2 DQ3CK1 CK0 BA0 BA1CKE0 DQMB2System memory connector pin input/output Pin Signal name VDD WE# GNDCAS# DQMB0# DQMB4# DQMB1#GND CK2 VrefSA0 SDA SA0 VDDPCI connector pin assignments Pin Signal PCI connectorsIRDY# FRAME#TRDY# DEVSEL#IDE connector pin assignments Pin Signal IDE connectorsDiskette drive connector pin assignments Pin Signal Diskette drive connectorMSEN0 MSEN1Power supply connector Wake on LAN connectorsUSB port connectors Serial port connector Mouse and keyboard port connectorsMouse port connector pin assignments Pin Signal Keyboard port connector pin assignments Pin SignalParallel port connector pin assignments Pin Signal Parallel port connectorAppendix B. System address maps System memory mapFFFE0000-FFFFFFFF Input/output address map O address map Address hex Size DescriptionLPT3 LPT2 COM2LPT1 COM1DMA I/O address map PCI configuration space map 52 PC 300 GL and 300 PL Appendix C. IRQ and DMA channel assignments IRQ channel assignmentsSystem resource DMA channel assignments Data width System resource Appendix D. Error codes Post error codesBeep codes 56 PC 300 GL and 300 PL IBM Appendix E. Notices and Trademarks58 PC 300 GL and 300 PL Bibliography 60 PC 300 GL and 300 PL PCI IndexUart