IBM PC 300GL manual Frame#, Irdy#, Trdy#, Devsel#, Stop#, Lock#, Sdone, Perr#, Sbo#, Serr#

Page 48

Table 22. PCI connector pin assignments

Pin

Signal

I/O

Pin

Signal

I/O

 

 

 

 

 

 

A28

Address/data 22

I/O

B28

Ground

N/A

 

 

 

 

 

 

A29

Address/data 20

I/O

B29

Address/data 21

I/O

 

 

 

 

 

 

A30

Ground

I/O

B30

Address/data 19

N/A

 

 

 

 

 

 

A31

Address/data 18

I/O

B31

+3.3 V dc

N/A

 

 

 

 

 

 

A32

Address/data 16

I/O

B32

Address/data 17

I/O

 

 

 

 

 

 

A33

+3.3 V dc

N/A

B33

C/BE2#

I/O

 

 

 

 

 

 

A34

FRAME#

I/O

B34

Ground

N/A

 

 

 

 

 

 

A35

Ground

N/A

B35

IRDY#

I/O

 

 

 

 

 

 

A36

TRDY#

I/O

B36

+3.3 V dc

N/A

 

 

 

 

 

 

A37

Ground

N/A

B37

DEVSEL#

I/O

 

 

 

 

 

 

A38

STOP#

I/O

B38

Ground

N/A

 

 

 

 

 

 

A39

+3.3 V dc

N/A

B39

LOCK#

I/O

 

 

 

 

 

 

A40

SDONE

I/O

B40

PERR#

I/O

 

 

 

 

 

 

A41

SBO#

I/O

B41

+3.3 V dc

N/A

 

 

 

 

 

 

A42

Ground

N/A

B42

SERR#

I/O

 

 

 

 

 

 

A43

+3.3 V dc

N/A

B43

+3.3 V dc

N/A

 

 

 

 

 

 

A44

C/BE(1)#

I/O

B44

C/BE 1#

I/O

 

 

 

 

 

 

A45

Address/data 14

I/O

B45

Address/data 14

I/O

 

 

 

 

 

 

A46

Ground

N/A

B46

Ground

N/A

 

 

 

 

 

 

A47

Address/data 12

I/O

B47

Address/data 12

I/O

 

 

 

 

 

 

A48

Address/data 10

I/O

B48

Address/data 10

I/O

 

 

 

 

 

 

A49

Ground

N/A

B49

Ground

N/A

 

 

 

 

 

 

A50

Key

N/A

B50

Key

N/A

 

 

 

 

 

 

A51

Key

N/A

B51

Key

N/A

 

 

 

 

 

 

A52

Address/data 8

I/O

B52

Address/data 8

I/O

 

 

 

 

 

 

A53

Address/data 7

I/O

B53

Address/data 7

I/O

 

 

 

 

 

 

A54

+3.3 V dc

N/A

B54

+3.3 V dc

N/A

 

 

 

 

 

 

A55

Address/data 5

I/O

B55

Address/data 5

I/O

 

 

 

 

 

 

A56

Address/data 3

I/O

B56

Address/data 3

I/O

 

 

 

 

 

 

A57

Ground

N/A

B57

Ground

N/A

 

 

 

 

 

 

A58

Address/data 1

I/O

B58

Address/data 1

I/O

 

 

 

 

 

 

A59

+5 V dc (I/O)

N/A

B59

+5 V dc (I/O)

N/A

 

 

 

 

 

 

A60

ACK64#

I/O

B60

ACK64#

I/O

 

 

 

 

 

 

A61

+5 V dc

N/A

B61

+5 V dc

N/A

 

 

 

 

 

 

A62

+5 V dc

N/A

A62

+5 V dc

N/A

 

 

 

 

 

 

Appendix A. Connector pin assignments 41

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Contents HcchM mlmiM mlni hcc mlml HcchM mlmiM mlni hcc mlml Second Edition March Contents Page Preface Related publicationsTerminology Features System OverviewCD-RW Adsl modems Wake on LANWake on Ring PC 300 GL and 300 PL System board features Intel Pentium III microprocessor with MMX technologyL2 Cache Chip set controlTable . Memory Configuration MB Total Memory Mem O PCI Bus IDE bus master interfaceUSB interface Video Subsystem Video subsystem resources Resource Assignment ROMRAM IRQAudio Subsystem Integrated peripheral controller Diskette Drive InterfaceSerial ports Parallel port Keyboard and mouse portsNetwork connection Real-time clock and CmosFlash Eeprom Expansion adaptersPhysical layout Rocker switches ÝdimmLarge rocker switch settings Microprocessor Speed Cable connectors Connector panelSmall rocker switch settings Function 18 PC 300 GL and 300 PL USB 20 PC 300 GL and 300 PL Physical specifications PC 300 GL and PL desktopPC300 PL and GL tower Heat outputAirflow Acoustical noise-emission valuesPhysical specifications 24 PC 300 GL and 300 PL Power supply Power inputPower output Power input requirements Specification MeasurementsComponent outputs System board Supply voltage Maximum current ToleranceKeyboard port Supply voltage Maximum current Tolerance USB port Supply voltage Maximum current ToleranceConnector description Output protectionVideo port pin Supply voltage Maximum current Tolerance 28 PC 300 GL and 300 PL System software Plug and PlayConfiguration/Setup Utility program Advanced Power Management APMAdvanced Configuration and Power Interface Acpi Flash update utility programSystem compatibility Hardware compatibilityHardware interrupts Software compatibility Software interruptsMachine-sensitive programs Appendix A. Connector pin assignments Svga monitor connectorSvga monitor port connector pin assignments Pin Signal DDC2BDVI-I monitor connector System memory connectorVSS DQ0 DQ1DQ2 DQ3BA0 BA1 CK1 CK0CKE0 DQMB2System memory connector pin input/output Pin Signal name GND VDD WE#CAS# DQMB0# DQMB4# DQMB1#Vref GND CK2SA0 SDA SA0 VDDPCI connectors PCI connector pin assignments Pin SignalFRAME# IRDY#TRDY# DEVSEL#IDE connectors IDE connector pin assignments Pin SignalDiskette drive connector Diskette drive connector pin assignments Pin SignalMSEN0 MSEN1Power supply connector Wake on LAN connectorsUSB port connectors Mouse and keyboard port connectors Serial port connectorMouse port connector pin assignments Pin Signal Keyboard port connector pin assignments Pin SignalParallel port connector Parallel port connector pin assignments Pin SignalAppendix B. System address maps System memory mapFFFE0000-FFFFFFFF Input/output address map O address map Address hex Size DescriptionLPT3 COM2 LPT2LPT1 COM1DMA I/O address map PCI configuration space map 52 PC 300 GL and 300 PL Appendix C. IRQ and DMA channel assignments IRQ channel assignmentsSystem resource DMA channel assignments Data width System resource Appendix D. Error codes Post error codesBeep codes 56 PC 300 GL and 300 PL Appendix E. Notices and Trademarks IBM58 PC 300 GL and 300 PL Bibliography 60 PC 300 GL and 300 PL Index PCIUart
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