This is the output clock signal used by the transmitter portion of the UART. It is generally connected to the UART's own receive clock input (RCLK). This is done by connecting pins 3 and 6 of the jumper pack. If desired, XCLK can be transmitted to an external source over the AUXOUT line by connecting pins 5 and 6 of the jumper pack. Figure 19 shows how to select the XCLK mode.
AUXOUT RTS
XCLK AUXOUT RTS
XCLK
4 | 5 | 7 |
1 | 2 | 3 |
CTS
AUXIN
| 4 | 6 | 7 |
| 1 | 2 | 3 |
RCLK | CTS |
| RCLK |
AUXIN |
|
Loopback XCLK to RCLK | Transmit XCLK on AUXOUT |
Figure 19 --- XCLK selection on J5, J7
7.4 AUXIN/AUXOUT Loopback
The AUXIN signal is an input from the external device, and connecting it to the AUXOUT signal provides for a loopback mode of operation. In other words, whatever signal is transmitted by the external device over the AUXIN line will be fed back to the external device over the AUXOUT line. This mode is accomplished by connecting pins 2 and 5 of the jumper pack. Figure 20 shows how to select this loopback mode.
AUXOUT
RTS
4
1
XCLK
66
23
CTS |
|
|
|
|
| RCLK |
|
|
|
|
| ||
AUXIN |
|
|
|
|
| |
|
|
|
|
| ||
| Loopback AUXOUT to AUXIN | |||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Figure 20 --- AUXIN/AUXOUT loopback on J5, J7
Quatech Inc. |