Delta Electronics LCP-10G3A4EDR manual Module Electrical Pin Definition

Page 6

LCP-10G3A4EDR

Module Electrical Pin Definition

Pin

Logic

Symbol

Name/Description

Note

1

 

VeeT

Module Transmitter Ground

1

2

LVTTL-O

TX_Fault

Module Transmitter Fault

2

3

LVTTL-I

TX_Disable

Transmitter Disable; Turns off transmitter laser output

3

4

LVTTL-I/O

SDA

2- write Serial Interface Data Line

 

5

LVTTL-I/O

SCL

2- write Serial Interface Clock

 

6

 

MOD_ABS

Module Absent, connected to VeeT or VeeR in the module

4

7

LVTTL-I

RS0

Not Implement

 

8

LVTTL-O

RX_LOS

Receiver Loss of Signal Indication

2

9

LVTTL-I

RS1

Not Implement

 

10

 

VeeR

Module Receiver Ground

1

11

 

VeeR

Module Receiver Ground

1

12

CML-O

RD-

Receiver Inverted Data Output

 

13

CML-O

RD+

Receiver Non-Inverter Data Output

 

14

 

VeeR

Module Receiver Ground

1

15

 

VccR

Module Receiver 3.3V Supply

 

16

 

VccT

Module Transmitter 3.3V Supply

 

17

 

VeeT

Module Transmitter Ground

1

18

CML-I

TD+

Transmitter Non-Inverted Data Input

 

19

CML-I

TD-

Transmitter Inverted Data Input

 

20

 

VeeT

Module Transmitter Griund

1

Note:

 

 

 

 

1.The module signal ground pins, VeeR and VeeT, shall be isolated from the module case.

2.This pin is an open collector/drain output pin and shall be pulled up with 4.7k-10k ohms to Host_Vcc on the host board. Pull ups can be connected to multiple power supplies, however the host board design shall ensure that no module pin has voltage exceeding module VccT/R + 0.5V.

3.This pin is an open collector/drain input pin and shall be pulled up with 4.7k-10k ohms to VccT in the Module.

4.This pin shall be pulled up with 4.7k-10k ohms to Host_Vcc on the host board.

6

Revision: 0B

 

2008/9/5

DELTA ELECTRONICS, INC.

www.deltaww.com

Image 6
Contents Description ApplicationsLow Speed Electrical Characteristics Absolute Maximum RatingsRecommended Operating Conditions Optical Transmitter Characteristics TC = -5to Optical Receiver Characteristics Tc = -5to LOS D-LOS aLink Length SFP+ Transceiver Electrical Pad LayoutPin Logic Symbol Name/Description Module Electrical Pin DefinitionTXDisable Low speed electrical control pins and 2-wire interfaceTXFault RS0/RS1LCP-10G3A4EDR Recommend Circuit Schematic Package Outline Drawing for Metal Housing with Bail de-latch Latch Color IdentifierParameter Symbol Min Max Unit Timing parameters for SFP+ managementEnhanced Digital Diagnostic Interface Eeprom Serial ID Memory Contents 2-Wire Address A0h Digital Diagnostic Monitoring Interface Address Name Value Dec Unit BytesOptional Set of Alarm and Warning State/ Control BitsFeature Test Method Reference Performance Regulatory Compliance