Ampro Corporation 5001451A manual Pin # Signal Name Function

					Little Board P6d Module
	Table 2-43. PC/104 Expansion Bus Connector, J1 (A1-B32)
Pin #	Signal Name	Function	Pin #	Signal	Function
				Name
A1	IOCHCK*	Bus NMI input	B1	GND	Ground
A2	SD7	Data bit 7	B2	RSTDRV	System reset signal
A3	SD6	Data bit 6	B3	+5V	+5 Volt power
A4	SD5	Data bit 5	B4	IRQ9	Interrupt request 9
A5	SD4	Data bit 4	B5	-5V	To J16-3
A6	SD3	Data bit 3	B6	DRQ2	DMA request 2
A7	SD2	Data bit 2	B7	-12V	To J16-1
A8	SD1	Data bit 1	B8	ZWS*	Zero wait state
A9	SD0	Data bit 0	B9	+12V	To J10-1
A10	IOCHRDY	I/O Ready Ctrl	B10	N/A	Keyed pin
A11	AEN	Address Enable	B11	SMEMW*	Mem Write(lwr 1MB)
A12	SA19	Address bit 19	B12	SMEMR*	Mem Read(lwr 1MB)
A13	SA18	Address bit 18	B13	IOW	I/O Write
A14	SA17	Address bit 17	B14	IOR	I/O Read
A15	SA16	Address bit 16	B15	DACK3*	DMA Acknowledge 3
A16	SA15	Address bit 15	B16	DRQ3	DMA Request 3
A17	SA14	Address bit 14	B17	DACK1*	DMA Acknowledge 1
A18	SA13	Address bit 13	B18	DRQ1	DMA Request 1
A19	SA12	Address bit 12	B19	RFSH*	Memory Refresh
A20	SA11	Address bit 11	B20	SYSCLK	Sys Clock
A21	SA10	Address bit 10	B21	IRQ7	Interrupt Request 7
A22	SA9	Address bit 9	B22	IRQ6	Interrupt Request 6
A23	SA8	Address bit 8	B23	IRQ5	Interrupt Request 5
A24	SA7	Address bit 7	B24	IRQ4	Interrupt Request 4
A25	SA6	Address bit 6	B25	IRQ3	Interrupt Request 3
A26	SA5	Address bit 5	B26	DACK2*	DMA Acknowledge 2
A27	SA4	Address bit 4	B27	TC	DMA Terminal Count
A28	SA3	Address bit 3	B28	BALE	Address latch enable
A29	SA2	Address bit 2	B29	+5V	+5V power
A30	SA1	Address bit 1	B30	OSC	14.3MHz clock
A31	SA0	Address bit 0	B31	GND	Ground
A32	GND	Ground	B32	GND	Ground

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