Silicon Laboratories SI4734/35-B20 manual SPI Control Interface Write Timing Parameters

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Si4734/35-B20

Table 7. SPI Control Interface Characteristics (VDD = 2.7 to 5.5 V, VIO = 1.5 to 3.6 V, TA = –20 to 85 °C)

 

Parameter

Symbol

Test Condition

Min

Typ

Max

Unit

 

 

 

 

 

 

 

 

 

SCLK Frequency

fCLK

 

0

2.5

MHz

 

SCLK High Time

tHIGH

 

25

ns

 

SCLK Low Time

tLOW

 

25

ns

 

SDIO Input,

 

to SCLKSetup

tS

 

15

ns

 

SEN

 

 

SDIO Input to SCLKHold

tHSDIO

 

10

ns

 

 

Input to SCLKHold

tHSEN

 

5

ns

 

SEN

 

 

SCLKto SDIO Output Valid

tCDV

Read

2

25

ns

 

SCLKto SDIO Output High Z

tCDZ

Read

2

25

ns

 

SCLK,

 

SDIO, Rise/Fall time

tR, tF

 

10

ns

 

SEN,

 

Note: When selecting SPI mode, the user must ensure that a rising edge of SCLK does not occur within 300 ns before the rising edge of RST.

SCLK

SEN

SDIO

70%

30%

70%

30%

70%

30%

tS

tS

 

C7

C6–C1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tHIGH

 

 

 

 

 

tLOW

 

 

 

tHSDIO

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C0D7

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tR

 

 

 

 

 

tF

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

D6–D1

tHSEN

D0

Control Byte In

8 Data Bytes In

Figure 6. SPI Control Interface Write Timing Parameters

SCLK

SEN

SDIO

70%

30%

70%

30%

70%

30%

tS

tS

C7

C6–C1

tCDV

tHSDIO

C0

tHSEN

tCDZ

D7 D6–D1D0

Control Byte In

Bus

16 Data Bytes Out

 

Turnaround

(SDIO or GPO1)

Figure 7. SPI Control Interface Read Timing Parameters

10

Rev. 1.0

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Contents Applications FeaturesFunctional Block Diagram DescriptionSi4734/35-B20 Table of Contents Parameter Symbol Value Unit Electrical SpecificationsParameter Symbol Test Condition Min Typ Max Unit Recommended Operating ConditionsAM/SW/LW Mode DC CharacteristicsParameter Symbol Test Condition Min Typ Max Unit FM Mode Supplies and InterfaceRST Parameter Symbol Min Typ Max UnitGPO1, GPO2/INT Wire Control Interface Characteristics1,2,3 StartSclk Sdio SEN SclkSPI Control Interface Write Timing Parameters Dclk DFS Dout RDS Bler 5% FM Receiver Characteristics1,2Fmdeemphasis = Si4734/35-B20 KHz Long Wave LW 153 279 Refclk RefclkprescaleCrystal Oscillator Typical Application Schematic Si4734/35-GMComponents Value/Description Supplier Bill of MaterialsOptional Components 5.5 Functional DescriptionOverview 3.6VAM Receiver Operating ModesFM Receiver SW ReceiverAudio Data Formats Digital Audio Interface Si4735 OnlyAudio Sample Rates I2S Digital Audio Format Soft Mute Stereo Audio Processing De-emphasisStereo DAC RDS/RBDS Processor Si4735 OnlySeek TuningBus Mode Select on Rising Edge Reference ClockSPI Control Interface Mode Programming with Commands Firmware UpgradesReset, Power Up, and Power Down GPO OutputsCmd Commands and PropertiesSi473x Command Summary DescriptionProp Name Description Default Si473x Property SummaryAmdeemphasis RdsconfigRxvolume AmchannelfilterPin Descriptions Si4734/35-GM Pin Numbers Name DescriptionQFN Ordering GuidePart Number Description Package Operating RDS/RBDSSi4734/35 Top Mark Package Markings Top MarksTop Mark Explanation Symbol Millimeters Min Nom Max Package Outline Si4734/35 QFNPCB Land Pattern Si4734/35 QFN PCB Land PatternSymbol Millimeters Min Max PCB Land Pattern DimensionsBSC Additional Reference Resources Document Change List Revision 0.4 to RevisionContact Information

SI4734/35-B20 specifications

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