Silicon Laboratories SI4734/35-B20 manual Tuning, Seek, Reference Clock, Control Interface

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Si4734/35-B20

4.13. Tuning

The frequency synthesizer uses Silicon Laboratories’ proven technology, including a completely integrated VCO. The frequency synthesizer generates the quadrature local oscillator signal used to downconvert the RF input to a low intermediate frequency. The VCO frequency is locked to the reference clock and adjusted with an automatic frequency control (AFC) servo loop during reception. The tuning frequency can be directly programmed using the FM_TUNE_FREQ and AM_TUNE_FREQ commands. The Si4734/35 supports channel spacing steps of 10 kHz in FM mode and 1 kHz in AM/SW/LW mode.

4.14. Seek

Seek tuning will search up or down for a valid channel. Valid channels are found when the receive signal strength indicator (RSSI) and the signal-to-noise ratio (SNR) values exceed the set threshold. Using the SNR qualifier rather than solely relying on the more traditional RSSI qualifier can reduce false stops and increase the number of valid stations detected. Seek is initiated using the FM_SEEK_START and AM_SEEK_START commands. The RSSI and SNR threshold settings are adjustable using properties (see Table 15).

Two seek options are available. The device will either wrap or stop at the band limits. If the seek operation is unable to find a channel, the device will indicate failure and return to the channel selected before the seek operation began.

4.15. Reference Clock

The Si4734/35 reference clock is programmable, supporting RCLK frequencies in Table 12. Refer to Table 3, “DC Characteristics,” on page 5 for switching voltage levels and Table 9, “FM Receiver Characteristics” on page 12 for frequency tolerance information.

An onboard crystal oscillator is available to generate the 32.768 kHz reference when an external crystal and load capacitors are provided. Refer to "2. Typical Application Schematic" on page 17. This mode is enabled using the POWER_UP command, see Table 14, “Si473x Command Summary,” on page 27.

The Si4734/35 performance may be affected by data activity on the SDIO bus when using the integrated internal oscillator. SDIO activity results from polling the tuner for status or communicating with other devices that share the SDIO bus. If there is SDIO bus activity while the Si4734/35 is performing the seek/tune function, the crystal oscillator may experience jitter, which may result in mistunes, false stops, and/or lower SNR.

For best seek/tune results, Silicon Laboratories recommends that all SDIO data traffic be suspended during Si4734/35 seek and tune operations. This is achieved by keeping the bus quiet for all other devices on the bus, and delaying tuner polling until the tune or seek operation is complete. The seek/tune complete (STC) interrupt should be used instead of polling to determine when a seek/tune operation is complete.

4.16. Control Interface

A serial port slave interface is provided, which allows an external controller to send commands to the Si4734/35 and receive responses from the device. The serial port can operate in three bus modes: 2-wire mode, 3-wire mode, or SPI mode. The Si4734/35 selects the bus mode by sampling the state of the GPO1 and GPO2 pins on the rising edge of RST. The GPO1 pin includes an internal pull-up resistor, which is connected while RST is low, and the GPO2 pin includes an internal pull- down resistor, which is connected while RST is low. Therefore, it is only necessary for the user to actively drive pins which differ from these states. See Table 13.

Table 13. Bus Mode Select on Rising Edge of

RST

Bus Mode

GPO1

GPO2

2-Wire

1

0

SPI

1

1 (must drive)

3-Wire

0 (must drive)

0

After the rising edge of RST, the pins GPO1 and GPO2 are used as general purpose output (O) pins, as described in Section “4.17. GPO Outputs”. In any bus mode, commands may only be sent after VIO and VDD supplies are applied.

In any bus mode, before sending a command or reading a response, the user must first read the status byte to ensure that the device is ready (CTS bit is high).

4.16.1. 2-Wire Control Interface Mode

When selecting 2-wire mode, the user must ensure that SCLK is high during the rising edge of RST, and stays high until after the first start condition. Also, a start condition must not occur within 300 ns before the rising edge of RST.

The 2-wire bus mode uses only the SCLK and SDIO pins for signaling. A transaction begins with the START condition, which occurs when SDIO falls while SCLK is high. Next, the user drives an 8-bit control word serially on SDIO, which is captured by the device on rising edges of SCLK. The control word consists of a 7-bit device address, followed by a read/write bit (read = 1, write = 0). The Si4734/35 acknowledges the control

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Contents Features Functional Block DiagramApplications DescriptionSi4734/35-B20 Table of Contents Electrical Specifications Parameter Symbol Test Condition Min Typ Max UnitParameter Symbol Value Unit Recommended Operating ConditionsDC Characteristics Parameter Symbol Test Condition Min Typ Max Unit FM ModeAM/SW/LW Mode Supplies and InterfaceParameter Symbol Min Typ Max Unit RSTGPO1, GPO2/INT Wire Control Interface Characteristics1,2,3 StartSclk Sdio SEN SclkSPI Control Interface Write Timing Parameters Dclk DFS Dout FM Receiver Characteristics1,2 RDS Bler 5%Fmdeemphasis = Si4734/35-B20 KHz Long Wave LW 153 279 Refclkprescale RefclkCrystal Oscillator Typical Application Schematic Si4734/35-GMBill of Materials Components Value/Description SupplierOptional Components Functional Description Overview5.5 3.6VOperating Modes FM ReceiverAM Receiver SW ReceiverDigital Audio Interface Si4735 Only Audio Data FormatsAudio Sample Rates I2S Digital Audio Format Stereo Audio Processing De-emphasis Stereo DACSoft Mute RDS/RBDS Processor Si4735 OnlyTuning Bus Mode Select on Rising EdgeSeek Reference ClockSPI Control Interface Mode Firmware Upgrades Reset, Power Up, and Power DownProgramming with Commands GPO OutputsCommands and Properties Si473x Command SummaryCmd DescriptionProp Name Description Default Si473x Property SummaryRdsconfig RxvolumeAmdeemphasis AmchannelfilterPin Descriptions Si4734/35-GM Pin Numbers Name DescriptionOrdering Guide Part Number Description Package OperatingQFN RDS/RBDSPackage Markings Top Marks Si4734/35 Top MarkTop Mark Explanation Symbol Millimeters Min Nom Max Package Outline Si4734/35 QFNPCB Land Pattern Si4734/35 QFN PCB Land PatternPCB Land Pattern Dimensions Symbol Millimeters Min MaxBSC Additional Reference Resources Document Change List Revision 0.4 to RevisionContact Information

SI4734/35-B20 specifications

Silicon Laboratories SI4734/35-B20 is an advanced, highly integrated broadcast radio receiver designed for various consumer applications. Hailed for its compactness and versatility, the SI4734/35-B20 offers extensive features that enable radio reception across multiple frequency bands, including AM, FM, and shortwave. It caters to the needs of manufacturers looking to incorporate reliable radio capabilities into their devices, ensuring quality sound and performance without the cumbersome designs typically associated with traditional radio receivers.

At the heart of the SI4734/35-B20 are performance-optimized technologies. One standout feature is the device's ability to support digital and analog processing simultaneously, utilizing Silicon Labs’ proprietary digital signal processing (DSP) technology. This architecture not only enhances signal clarity but also helps in mitigating noise, enabling users to experience a superior audio quality across varied environments.

Another notable characteristic of the SI4734/35-B20 is its low power consumption, making it ideal for battery-operated devices. The receiver employs sophisticated power management techniques that allow it to operate efficiently, prolonging battery life while maintaining optimal performance. In this context, the “sleep” mode and fast wake-up times contribute to significant energy savings, affirming its suitability for portable applications.

The SI4734/35-B20 is designed with a robust set of features for ease of integration into various systems. The device supports multiple programmable interfaces, including I2C, providing flexibility in communication with microcontrollers and facilitating straightforward integration into existing designs. Because of its programmable architecture, developers can customize the receiver’s capabilities according to the specific needs of their applications.

Additional features include automatic frequency control (AFC) for stability in tuning, allowing seamless transitions while listening to programs. The built-in AGC (automatic gain control) optimizes the receiver's sensitivity to ensure clear reception even in weak signal conditions.

The SI4734/35-B20 also possesses a wide frequency range, accommodating both standard and niche applications. Its compact form factor and surface-mount technology (SMT) footprint further enhance its appeal to developers seeking to maximize board space in their designs.

In conclusion, the Silicon Laboratories SI4734/35-B20 is a significant advancement in radio receiver technology, combining advanced DSP, low power consumption, and ease of integration. These attributes make it a preferred choice for engineers and manufacturers looking to deliver high-quality audio experiences across a range of consumer electronics, from radios to multifunctional smart devices.
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