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| STK17T88 |
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MODE Selection |
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| Mode | I/O | Power | Notes |
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| G |
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H |
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| X | Not Selected | Output High Z | Standby |
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| L |
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| X | Read SRAM | Output Data | Active |
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| X | Write SRAM | Input Data | Active |
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| 0x0E38 | Read SRAM | Output Data |
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| 0x31C7 | Read SRAM | Output Data |
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| 0x03E0 | Read SRAM | Output Data | Active | 17,18, 19 |
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| 0x3C1F | Read SRAM | Output Data |
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| 0x303F | Read SRAM | Output Data |
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| 0x0FC0 | Nonvolatile Store | Output High Z | ICC2 |
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| 0x0E38 | Read SRAM | Output Data | Active |
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| 0x31C7 | Read SRAM | Output Data |
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| 0x03E0 | Read SRAM | Output Data |
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| 0x3C1F | Read SRAM | Output Data |
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| 0x303F | Read SRAM | Output Data |
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| 0x0C63 | Nonvolatile Recall | Output High Z |
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Notes
17.The six consecutive addresses must be in the order listed. W must be high during all six consecutive cycles to enable a nonvolatile cycle.
18.While there are 15 addresses on the STK17T88, only the lower 13 are used to control software modes.
19.I/O state depends on the state of G. The I/O table shown assumes G low.
Document Number: | Page 11 of 22 |
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