Cypress CY62138EV30 manual Pin Configuration2, Product Portfolio, = 1 MHz = f max Min Typ Max

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CY62138EV30

MoBL®

Pin Configuration[2]

FBGA

Top View

A0

A1

NC A3

A6

A8

A

I/O4

A2

WE

A4

A7

I/O0

B

I/O5

 

NC

A5

 

 

I/O1

C

VSS

 

 

 

 

 

Vcc

D

V

 

 

 

 

 

Vss

E

CC

 

 

 

 

 

 

 

I/O6

 

NC

A17

 

 

I/O2

F

I/O

OE

CE

A16

A

15

I/O

G

7

 

 

 

 

3

 

A9

A10

A11

A12

A13

A14

H

Product Portfolio

 

 

 

 

 

 

 

 

 

Power Dissipation

 

 

Product

 

VCC Range (V)

 

 

 

Operating ICC (mA)

 

 

Standby ISB2 (A)

 

 

Speed

f = 1 MHz

f = fmax

 

 

 

 

 

 

Min.

 

Typ.[3]

 

Max.

(ns)

Typ.[3]

Max.

Typ.[3]

Max.

 

Typ.[3]

Max.

CY62138EV30LL

2.2

 

3.0

 

3.6

45

2

2.5

15

20

 

1

7

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Notes:

 

 

 

 

 

 

 

 

 

 

 

 

 

2.NC pins are not connected on the die.

3.Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ.), TA = 25°C.

Document #: 38-05577 Rev. *A

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Contents Functional Description1 FeaturesLogic Block Diagram Cypress Semiconductor Corporation= 1 MHz = f max Min Typ Max Pin Configuration2Product Portfolio Typ MaxElectrical Characteristics Over the Operating Range Maximum RatingsAC Test Loads and Waveforms Data Retention Characteristics Over the Operating RangeThermal Resistance Data Retention Waveform45 ns Parameter Description Unit Min Max Read Cycle Switching Characteristics Over the Operating Range9Switching Waveforms Write CycleRead Cycle No OE Controlled14 Write Cycle No WE Controlled16Write Cycle No CE Controlled16 Inputs/Outputs Mode PowerTruth Table Write Cycle No WE Controlled, OE LOW18Ball Vfbga 6 x 8 x 1 mm Package DiagramsOrdering Information Issue Orig. Description of Change Date Document History