Cypress CY62138EV30 manual Features, Functional Description1, Logic Block Diagram, A a a a

CY62138EV30

MoBL®

2-Mbit (256K x 8) MoBL→ Static RAM

Features

•Very high speed: 45 ns

—Wide voltage range: 2.20V – 3.60V

•Pin-compatible with CY62138CV30

•Ultra-low standby power

—Typical standby current: 1 ∝A

—Maximum standby current: 7 ∝A

•Ultra-low active power

—Typical active current: 2 mA @ f = 1 MHz

•Easy memory expansion with CE and OE features

•Automatic power-down when deselected

•CMOS for optimum speed/power

•Offered in Pb-free 36-ball BGA package

Functional Description[1]

The CY62138EV30 is a high-performance CMOS static RAM organized as 256K words by 8 bits. This device features advanced circuit design to provide ultra-low active current. This is ideal for providing More Battery Life™ (MoBL→) in portable applications such as cellular telephones. The device also has an automatic power-down feature that significantly reduces power consumption. The device can be put into standby mode reducing power consumption when deselected (CE HIGH).

Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. Data on the eight I/O pins (I/O0 through I/O7) is then written into the location specified on the address pins (A0 through A18).

Reading from the device is accomplished by taking Chip Enable (CE) and Output Enable (OE) LOW while forcing Write Enable (WE) HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins.

The eight input/output pins (I/O0 through I/O7) are placed in a high-impedance state when the device is deselected (CE HIGH), the outputs are disabled (OE HIGH), or during a write operation (CE LOW and WE LOW).

Logic Block Diagram
	Data in Drivers					I/O0
A						I/O
A10	DECODER					1
A						I/O2
A23					AMPS
A
A45						I/O3
A		256K x 8
A6	ROW				SENSE
A7		ARRAY
A89						I/O4
A10
A11						I/O5
CE		COLUMN			POWER	I/O6
					DOWN
		DECODER
						I/O7
WE
OE	12	13	14	15 16 17
	A A A A A A
Note:

1. For best practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.

Cypress Semiconductor Corporation	•	198 Champion Court • San Jose, CA 95134-1709	•	408-943-2600
Document #: 38-05577 Rev. *A		Revised February 14, 2006

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