Cypress CY62138EV30 Thermal Resistance, AC Test Loads and Waveforms, Data Retention Waveform

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CY62138EV30

MoBL®

Thermal Resistance

Parameter

Description

Test Conditions

BGA

Unit

 

 

 

 

 

ΘJA

Thermal Resistance

Still Air, soldered on a 3 x 4.5 inch, four-layer

72

°C/W

 

(Junction to Ambient)

printed circuit board

 

 

 

 

 

 

 

ΘJC

Thermal Resistance

 

8.86

°C/W

 

(Junction to Case)

 

 

 

 

 

 

 

 

AC Test Loads and Waveforms

R1

VCC

OUTPUT

30 pF

INCLUDING

JIG AND

SCOPE

 

VCC

 

 

 

 

 

 

 

 

ALL INPUT PULSES

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

90%

 

10%

 

 

 

 

 

 

90%

 

 

 

 

 

10%

R2

 

 

 

 

 

 

 

 

 

 

 

 

 

GND

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Fall time: 1 V/ns

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Rise Time: 1 V/ns

 

 

 

 

 

 

 

 

 

 

 

 

Equivalent to: THÉVENIN EQUIVALENT

RTH

OUTPUT VTH

Parameters

2.50V

3.0V

Unit

R1

16667

1103

 

 

 

 

R2

15385

1554

 

 

 

 

RTH

8000

645

VTH

1.20

1.75

V

Data Retention Characteristics (Over the Operating Range)

Parameter

Description

 

 

Conditions

Min.

Typ.[3]

Max.

 

Unit

VDR

VCC for Data Retention

 

 

 

 

 

 

 

 

1

 

 

 

V

ICCDR

Data Retention Current

VCC = 1V,

 

> VCC 0.2V,

 

0.8

3

 

A

CE

 

 

 

 

 

 

VIN > VCC 0.2V or VIN < 0.2V

 

 

 

 

 

tCDR[7]

Chip Deselect to Data Retention Time

 

 

 

 

 

 

 

 

0

 

 

 

ns

tR[8]

Operation Recovery Time

 

 

 

 

 

 

 

 

tRC

 

 

 

ns

Data Retention Waveform

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DATA RETENTION MODE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCC

 

 

 

 

 

 

 

 

 

 

 

 

 

1.5V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCC (min.)

 

 

 

VDR > 1.5 V

 

 

 

tCDR

tR

CE

 

Notes:

7.Tested initially and after any design or process changes that may affect these parameters.

8.Full Device AC operation requires linear VCC ramp from VDR to VCC(min.) > 100 s or stable at VCC(min.) > 100 s.

Document #: 38-05577 Rev. *A

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Contents Features Logic Block DiagramFunctional Description1 Cypress Semiconductor CorporationPin Configuration2 Product Portfolio= 1 MHz = f max Min Typ Max Typ MaxElectrical Characteristics Over the Operating Range Maximum RatingsData Retention Characteristics Over the Operating Range Thermal ResistanceAC Test Loads and Waveforms Data Retention WaveformSwitching Characteristics Over the Operating Range9 Switching Waveforms45 ns Parameter Description Unit Min Max Read Cycle Write CycleRead Cycle No OE Controlled14 Write Cycle No WE Controlled16Inputs/Outputs Mode Power Truth TableWrite Cycle No CE Controlled16 Write Cycle No WE Controlled, OE LOW18Ordering Information Package DiagramsBall Vfbga 6 x 8 x 1 mm Issue Orig. Description of Change Date Document History