Cypress CY14B102L, nvSRAM manual Software Controlled STORE/RECALL Cycle

Page 13

PRELIMINARY

CY14B102L, CY14B102N

Software Controlled STORE/RECALL Cycle

In the following table, the software controlled STORE/RECALL cycle parameters are listed.[26, 27]

Parameters

Description

 

20 ns

 

25 ns

 

45 ns

Unit

Min

 

Max

Min

 

Max

Min

 

Max

 

 

 

 

 

 

tRC

STORE/RECALL Initiation Cycle Time

20

 

 

25

 

 

45

 

 

ns

tSA

Address Setup Time

0

 

 

0

 

 

0

 

 

ns

tCW

Clock Pulse Width

15

 

 

20

 

 

30

 

 

ns

tHA

Address Hold Time

0

 

 

0

 

 

0

 

 

ns

tRECALL

RECALL Duration

 

 

200

 

 

200

 

 

200

μs

Switching Waveforms

Figure 12. CE and OE Controlled Software STORE/RECALL Cycle[27]

 

 

W5&

W5&

 

$GGUHVV

 

$GGUHVV

$GGUHVV

 

 

W6$

W&:

W&:

 

 

 

 

&(

 

W+$

W+$

 

W

 

 

6$

W+$

W

 

 

 

 

 

 

 

 

 

+$

2(

 

 

 

 

 

 

 

 

W+++'

+6% 6725(RQO\

W/=&(

W+=&(

W'(/$<

W/=+6%

 

 

'4 '$7$

 

 

 

+LJK,PSHGDQFH

 

 

 

W6725(W5(&$//

 

 

 

 

5:,

 

 

 

 

Figure 13. Autostore Enable/Disable Cycle

 

W5&

W5&

$GGUHVV

$GGUHVV

$GGUHVV

W6$

W&:

W&:

 

&(

W+$

W+$

W6$

W+$

 

W

 

 

+$

2(

 

 

 

W+=&(

W66

W/=&(

W

 

 

'(/$<

'4 '$7$

 

 

5:,

 

 

Notes

26.The software sequence is clocked with CE controlled or OE controlled reads.

27.The six consecutive addresses must be read in the order listed in Table 1 on page 5. WE must be HIGH during all six consecutive cycles.

Document #: 001-45754 Rev. *B

Page 13 of 24

[+] Feedback

Image 13
Contents Logic Block Diagram1, 2 FeaturesFunctional Description Cypress Semiconductor CorporationTop View PinoutsNot to scale Pin Definitions Sram Read Device OperationSram Write AutoStore OperationMode Selection Hardware Recall Power UpA15 A08 Mode Power Software StorePreventing AutoStore Mode Selection A15 A08 PowerData Protection Noise ConsiderationsMaximum Ratings DC Electrical CharacteristicsOperating Range Capacitance Data Retention and EnduranceThermal Resistance AC Test ConditionsSwitching Waveforms AC Switching CharacteristicsMin Max Sram Read Cycle+LJK,PSHGDQFH $GGUHVV $GGUHVV9DOLG6WDQGE\ $FWLYH Sram Write Cycle #2 CE Controlled3, 18, 19 Parameters Description 20 ns 25 ns 45 ns Unit Min Max AutoStore/Power Up RecallHSB Software Controlled STORE/RECALL Cycle Hardware Store Cycle To Output Active Time when write latch not setDescription 20 ns 25 ns 45 ns Unit Min Max Hardware Store Pulse WidthTruth Table For Sram Operations Inputs/Outputs2 Mode PowerHigh Z Ordering Information CY14B102L-ZS25XIT CY14B102L-ZS25XCTCY14B102L-ZS25XAT CY14B102N-BA25XCTCY14B102L-ZS45XIT CY14B102L-ZS45XCTCY14B102L-ZS45XAT CY14B102L-BA45XCTCY 14 B 102 L ZS P 20 X C T Part Numbering NomenclatureZS Tsop NvsramTOP View Package DiagramsBall Fbga 6 mm x 10 mm x 1.2 mm 51-85160 Gvch Document HistoryGVCH/AESA GVCH/PYRSUSB Sales, Solutions, and Legal Information

CY14B102L, nvSRAM specifications

Cypress nvSRAM CY14B102L is a sophisticated memory solution designed to bridge the gap between volatile and non-volatile memory technologies. This device offers a unique blend of SRAM speed with the non-volatility of Flash memory, making it an ideal choice for applications that require data retention without the need for continuous power.

One of the standout features of the CY14B102L is its ability to retain data for over 20 years without power, thanks to its innovative non-volatile SRAM technology. This means that critical information can be stored safely during power outages or system failures, ensuring data integrity in mission-critical applications. The device uses a reliable, self-timed write process, which simplifies the write operation and enhances system efficiency by eliminating the need for complex write management processes.

With a capacity of 1 megabit (128 K x 8), the CY14B102L offers ample storage for a wide variety of applications. Its fast access times, typically around 45 ns, make it suitable for high-speed operations typically associated with SRAMs. This rapid access is paramount for real-time applications where delays can lead to critical failures or data corruption.

The CY14B102L utilizes a CMOS process technology that not only contributes to its low power consumption but also ensures high reliability and durability. Operating in the wide temperature range of -40°C to +125°C, this nvSRAM is well-suited for automotive, industrial, and telecommunications applications.

In terms of connectivity, the CY14B102L supports a standard SRAM interface, simplifying integration into existing systems. Additionally, its ease of use is further enhanced by being available in a variety of package options, allowing designers to select the best fit for their needs without compromising on performance.

In conclusion, the Cypress nvSRAM CY14B102L is a powerful memory device that combines the speed of SRAM with non-volatile storage capabilities. With its extended data retention, fast access times, efficient write processes, and robust design, it is an excellent choice for applications that demand both speed and reliability, making it an invaluable asset for engineers looking to optimize system performance while maintaining data integrity.