Cypress CY14B102L, nvSRAM Truth Table For Sram Operations, Inputs/Outputs2 Mode Power, High Z

Page 15

PRELIMINARY

 

 

 

 

 

 

 

 

 

 

 

 

CY14B102L, CY14B102N

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Truth Table For SRAM Operations

 

 

 

 

 

 

 

should remain HIGH for SRAM Operations.

 

 

 

 

 

HSB

 

 

 

 

 

For x8 Configuration

 

 

 

 

 

 

 

 

 

CE

 

 

WE

 

 

OE

 

Inputs/Outputs[2]

Mode

 

Power

 

 

 

H

 

 

X

 

X

High Z

Deselect/Power down

 

Standby

 

 

 

 

L

 

 

H

 

L

Data Out (DQ0–DQ7);

Read

 

Active

 

 

 

 

L

 

 

H

 

H

High Z

Output Disabled

 

Active

 

 

 

 

L

 

 

L

 

X

Data in (DQ0–DQ7);

Write

 

Active

 

 

For x16 Configuration

 

CE

 

 

WE

 

 

OE

 

 

BHE

 

 

BLE

 

Inputs/Outputs[2]

Mode

Power

 

H

 

 

X

 

 

X

 

 

X

 

 

X

 

High-Z

Deselect/Power down

Standby

 

L

 

 

X

 

 

X

 

 

H

 

 

H

 

High-Z

Output Disabled

Active

 

L

 

 

H

 

 

L

 

 

L

 

 

L

 

Data Out (DQ0–DQ15)

Read

Active

 

L

 

 

H

 

 

L

 

 

H

 

 

L

 

Data Out (DQ0–DQ7);

Read

Active

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DQ8–DQ15in High-Z

 

 

 

L

 

 

H

 

 

L

 

 

L

 

 

H

 

Data Out (DQ8–DQ15);

Read

Active

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DQ0–DQ7in High-Z

 

 

 

L

 

 

H

 

 

H

 

 

L

 

 

L

 

High-Z

Output Disabled

Active

 

L

 

 

H

 

 

H

 

 

H

 

 

L

 

High-Z

Output Disabled

Active

 

L

 

 

H

 

 

H

 

 

L

 

 

H

 

High-Z

Output Disabled

Active

 

L

 

 

L

 

 

X

 

 

L

 

 

L

 

Data In (DQ0–DQ15)

Write

Active

 

L

 

 

L

 

 

X

 

 

H

 

 

L

 

Data In (DQ0–DQ7);

Write

Active

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DQ8–DQ15in High-Z

 

 

 

L

 

 

L

 

 

X

 

 

L

 

 

H

 

Data In (DQ8–DQ15);

Write

Active

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DQ0–DQ7in High-Z

 

 

Document #: 001-45754 Rev. *B

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Contents Cypress Semiconductor Corporation FeaturesLogic Block Diagram1, 2 Functional DescriptionPinouts Top ViewNot to scale Pin Definitions AutoStore Operation Device OperationSram Read Sram WriteSoftware Store Hardware Recall Power UpMode Selection A15 A08 Mode PowerNoise Considerations Mode Selection A15 A08 PowerPreventing AutoStore Data ProtectionDC Electrical Characteristics Maximum RatingsOperating Range AC Test Conditions Data Retention and EnduranceCapacitance Thermal ResistanceSram Read Cycle AC Switching CharacteristicsSwitching Waveforms Min Max$GGUHVV $GGUHVV9DOLG +LJK,PSHGDQFH6WDQGE\ $FWLYH Sram Write Cycle #2 CE Controlled3, 18, 19 AutoStore/Power Up Recall Parameters Description 20 ns 25 ns 45 ns Unit Min MaxHSB Software Controlled STORE/RECALL Cycle Hardware Store Pulse Width To Output Active Time when write latch not setHardware Store Cycle Description 20 ns 25 ns 45 ns Unit Min MaxInputs/Outputs2 Mode Power Truth Table For Sram OperationsHigh Z Ordering Information CY14B102N-BA25XCT CY14B102L-ZS25XCTCY14B102L-ZS25XIT CY14B102L-ZS25XATCY14B102L-BA45XCT CY14B102L-ZS45XCTCY14B102L-ZS45XIT CY14B102L-ZS45XATNvsram Part Numbering NomenclatureCY 14 B 102 L ZS P 20 X C T ZS TsopTOP View Package DiagramsBall Fbga 6 mm x 10 mm x 1.2 mm 51-85160 GVCH/PYRS Document HistoryGvch GVCH/AESAUSB Sales, Solutions, and Legal Information

CY14B102L, nvSRAM specifications

Cypress nvSRAM CY14B102L is a sophisticated memory solution designed to bridge the gap between volatile and non-volatile memory technologies. This device offers a unique blend of SRAM speed with the non-volatility of Flash memory, making it an ideal choice for applications that require data retention without the need for continuous power.

One of the standout features of the CY14B102L is its ability to retain data for over 20 years without power, thanks to its innovative non-volatile SRAM technology. This means that critical information can be stored safely during power outages or system failures, ensuring data integrity in mission-critical applications. The device uses a reliable, self-timed write process, which simplifies the write operation and enhances system efficiency by eliminating the need for complex write management processes.

With a capacity of 1 megabit (128 K x 8), the CY14B102L offers ample storage for a wide variety of applications. Its fast access times, typically around 45 ns, make it suitable for high-speed operations typically associated with SRAMs. This rapid access is paramount for real-time applications where delays can lead to critical failures or data corruption.

The CY14B102L utilizes a CMOS process technology that not only contributes to its low power consumption but also ensures high reliability and durability. Operating in the wide temperature range of -40°C to +125°C, this nvSRAM is well-suited for automotive, industrial, and telecommunications applications.

In terms of connectivity, the CY14B102L supports a standard SRAM interface, simplifying integration into existing systems. Additionally, its ease of use is further enhanced by being available in a variety of package options, allowing designers to select the best fit for their needs without compromising on performance.

In conclusion, the Cypress nvSRAM CY14B102L is a powerful memory device that combines the speed of SRAM with non-volatile storage capabilities. With its extended data retention, fast access times, efficient write processes, and robust design, it is an excellent choice for applications that demand both speed and reliability, making it an invaluable asset for engineers looking to optimize system performance while maintaining data integrity.