Cypress CY7C1223H manual Write Timing16, Undefined

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CY7C1223H

Switching Waveforms (continued)

Write Timing[16, 17]

tCYC

CLK

tCH tCL

tADS tADH

ADSP

tADS tADH

ADSC

tAS tAH

ADDRESS A1 A2

Byte write signals are ignored for first cycle when

ADSP initiates burst

ADSC extends burst

tADS tADH

A3

tWES tWEH

BWE,

BW[A:B]

tWES tWEH

GW

tCES tCEH

CE

tADVS tADVH

ADV

ADV suspends burst

OE

Data in (D)

High-Z

Data Out (Q)

tOEHZ

tt

DS DH

D(A1)

D(A2)

D(A2 + 1)

D(A2 + 1) D(A2 + 2)

D(A2 + 3)

D(A3)

D(A3 + 1) D(A3 + 2)

BURST READ Single WRITE BURST WRITE DON’T CARE

Extended BURST WRITE

UNDEFINED

Note:

17. Full width write can be initiated by either GW LOW; or by GW HIGH, BWE LOW and BW[A:B] LOW.

Document #: 38-05674 Rev. *B

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Contents Features Selection Guide166 MHz 133 MHz Unit Cypress Semiconductor CorporationLogic Block Diagram OutputPin Configurations CY7C1223HTop View Pin Descriptions Sleep Mode Functional OverviewBurst Sequences A1, A0 Adsp Adsc ADV Write CLKZZ Mode Electrical Characteristics FunctionParameter Description Test Conditions Min Max Unit Electrical Characteristics Over the Operating Range7 Maximum RatingsOperating Range Ambient RangeThermal Characteristics9 Capacitance9AC Test Loads and Waveforms Switching Characteristics Over the Operating Range 14 Switching Waveforms Read Timing16Write Timing16 UndefinedRead/Write Timing16, 18 Adsp AdscZZ Mode Timing 20,21 DON’T CarePackage Diagram Ordering InformationPin Tqfp 14 x 20 x 1.4 mm Issue Date Orig. Description of Change Document History