Cypress CY7C1333H Ordering Information, NOP, Stall and Deselect Cycles18, 19, ZZ Mode Timing22

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PRELIMINARYCY7C1333H

Switching Waveforms (continued)

NOP, STALL and DESELECT Cycles[18, 19, 21]

1

2

3

4

5

6

7

8

9

10

CLK

CEN

CE

ADV/LD

WE

BW[A:B]

ADDRESS

DQ

COMMAND

A1

A2

 

A3

A4

 

 

A5

 

 

 

 

 

 

 

 

 

tCHZ

 

D(A1)

 

Q(A2)

Q(A3)

 

D(A4)

 

Q(A5)

 

 

 

 

 

 

 

 

tDOH

WRITE

READ

STALL

READ

WRITE

STALL

NOP

READ

DESELECT CONTINUE

D(A1)

Q(A2)

 

Q(A3)

D(A4)

 

 

Q(A5)

DESELECT

 

 

 

DON’T CARE

UNDEFINED

 

 

ZZMode Timing[22, 23]

CLK

t ZZ

ZZ

t ZZI

ISUPPLY

I DDZZ

ALL INPUTS (except ZZ)

Outputs (Q)

Ordering Information

High-Z

DON’T CARE

t ZZREC

t RZZI

DESELECT or READ Only

Speed

Ordering Code

Package

Package Type

Operating

(MHz)

Name

Range

 

 

 

 

 

133

CY7C1333H-133AXC

A101

Lead-Free 100-lead Thin Quad Flat Pack (14 x 20 x 1.4 mm)

Commercial

 

 

 

 

 

 

CY7C1333H-133AXI

A101

Lead-Free 100-lead Thin Quad Flat Pack (14 x 20 x 1.4 mm)

Industrial

100

CY7C1333H-100AXC

A101

Lead-Free 100-lead Thin Quad Flat Pack (14 x 20 x 1.4 mm)

Commercial

 

CY7C1333H-100AXI

A101

Lead-Free 100-lead Thin Quad Flat Pack (14 x 20 x 1.4 mm)

Industrial

 

 

 

 

 

Shaded area contains advance information. Please contact your local Cypress sales representative for availability of this part.

21.The IGNORE CLOCK EDGE or STALL cycle (Clock 3) illustrated CEN being used to create a pause. A write is not performed during this cycle.

22.Device must be deselected when entering ZZ mode. See Truth Table for all possible signal conditions to deselect the device.

23.I/Os are in three-state when exiting ZZ sleep mode.

Document #: 001-00209 Rev. **

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Contents Functional Description1 FeaturesLogic Block Diagram Cypress Semiconductor CorporationCY7C1333H Pin ConfigurationsSelection Guide CY7C1333H-133 CY7C1333H-100 UnitPower supply for the I/O circuitry Mode Input. Selects the burst order of the devicePower supply inputs to the core of the device Name DescriptionFunctional Overview First Second Third Fourth Address Linear Burst Address Table Mode = GNDFirst Second Third Fourth Address A1, A0 Parameter Description Test Conditions Min Max UnitTruth Table for Read/Write 2 FunctionOperating Range Maximum RatingsThermal Resistance11 Capacitance Switching Characteristics Over the Operating Range 12AC Test Loads and Waveforms AD Hold after CLK Rise Switching WaveformsAddress Hold after CLK Rise Read/Write Waveforms 18, 19Ordering Information ZZ Mode Timing22NOP, Stall and Deselect Cycles18, 19 Package Diagram Lead Thin Plastic Quad Flatpack 14 x 20 x 1.4 mm A101New Datasheet Issue Date Orig. Description of Change 347377Document History