Cypress CY7C1333H manual Maximum Ratings, Operating Range, Thermal Resistance11

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PRELIMINARYCY7C1333H

Maximum Ratings

(Above which the useful life may be impaired. For user guide- lines, not tested.)

Storage Temperature

–65°C to +150°C

Current into Outputs (LOW)

20 mA

Static Discharge Voltage

> 2001V

(per MIL-STD-883, Method 3015)

 

Latch-up Current

> 200 mA

Ambient Temperature with

 

 

Power Applied

–55°C to +125°C

Supply Voltage on VDD Relative to GND

...... –0.5V to +4.6V

DC Voltage Applied to Outputs

 

 

in Tri-State

–0.5V to VDDQ + 0.5V

DC Input Voltage

–0.5V to VDD + 0.5V

Electrical Characteristics Over the Operating Range [9,10]

Operating Range

 

Ambient

 

 

Range

Temperature (TA)

VDD

VDDQ

Com’l

0°C to +70°C

3.3V – 5%/+10%

3.3V – 5% to

 

 

 

VDD

Ind’l

-40°C to +85°C

 

Parameter

Description

Test Conditions

Min.

Max.

Unit

VDD

Power Supply Voltage

 

 

3.135

3.6

V

VDDQ

I/O Supply Voltage

for 3.3V I/O

 

3.135

VDD

V

VOH

Output HIGH Voltage

for 3.3V I/O, IOH = –4.0 mA

 

2.4

 

V

VOL

Output LOW Voltage

for 3.3V I/O, IOL = 8.0 mA

 

 

0.4

V

VIH

Input HIGH Voltage

for 3.3V I/O

 

2.0

VDD + 0.3V

V

VIL

Input LOW Voltage[9]

for 3.3V I/O

 

–0.3

0.8

V

IX

Input Load Current (except

GND ≤ VI ≤ VDDQ

 

–5

5

µA

 

ZZ and MODE)

 

 

 

 

 

 

Input Current of MODE

Input = VSS

 

–30

 

µA

 

 

Input = VDD

 

 

5

µA

 

Input Current of ZZ

Input = VSS

 

–5

 

µA

 

 

Input = VDD

 

 

30

µA

IOZ

Output Leakage Current

GND ≤ VI ≤ VDD, Output Disabled

 

–5

5

µA

IDD

VDD Operating Supply

VDD = Max., IOUT = 0 mA,

7.5-ns cycle, 133 MHz

 

225

mA

 

Current

f = fMAX= 1/tCYC

10-ns cycle, 100 MHz

 

205

mA

ISB1

Automatic CE Power-down

VDD = Max, Device Deselected,

7.5-ns cycle, 133 MHz

 

90

mA

 

Current—TTL Inputs

VIN ≥ VIH or VIN ≤ VIL, f = fMAX,

10-ns cycle, 100 MHz

 

80

mA

 

 

inputs switching

 

 

 

 

ISB2

Automatic CE Power-down

VDD = Max, Device Deselected,

All speeds

 

40

mA

 

Current—CMOS Inputs

VIN ≥ VDD – 0.3V or VIN ≤ 0.3V,

 

 

 

 

 

 

f = 0, inputs static

 

 

 

 

ISB3

Automatic CE Power-down

VDD = Max, Device Deselected,

7.5-ns cycle, 133 MHz

 

75

mA

 

Current—CMOS Inputs

VIN ≥ VDDQ – 0.3V or VIN ≤ 0.3V,

10-ns cycle, 100 MHz

 

65

mA

 

 

f = fMAX, inputs switching

 

 

 

 

ISB4

Automatic CE Power-down

VDD = Max, Device Deselected,

All speeds

 

45

mA

 

Current—TTL Inputs

VIN ≥ VDD – 0.3V or VIN ≤ 0.3V,

 

 

 

 

 

 

f = 0, inputs static

 

 

 

 

Thermal Resistance[11]

 

Parameters

Description

Test Conditions

100 TQFP

Unit

 

Package

 

 

 

 

 

 

 

ΘJA

Thermal Resistance

Test conditions follow standard test methods and

30.32

°C/W

 

 

(Junction to Ambient)

procedures for measuring thermal impedance,

 

 

 

 

 

per EIA/JESD51

 

 

 

ΘJC

Thermal Resistance

6.85

°C/W

 

 

 

 

(Junction to Case)

 

 

 

 

Notes:

 

 

 

 

 

9. Overshoot: VIH(AC) < VDD +1.5V (Pulse width less than tCYC/2), undershoot: VIL(AC)> –2V (Pulse width less than tCYC/2).

 

 

 

10. Power-up: Assumes a linear ramp from 0V to VDD (min.) within 200 ms. During this time VIH < VDD and VDDQ < VDD.

 

 

 

11. Tested initially and after any design or process changes that may affect these parameters.

 

 

Document #: 001-00209 Rev. **

 

Page 7 of 12

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Contents Cypress Semiconductor Corporation FeaturesLogic Block Diagram Functional Description1CY7C1333H-133 CY7C1333H-100 Unit Pin ConfigurationsSelection Guide CY7C1333HName Description Mode Input. Selects the burst order of the devicePower supply inputs to the core of the device Power supply for the I/O circuitryFunctional Overview Parameter Description Test Conditions Min Max Unit Linear Burst Address Table Mode = GNDFirst Second Third Fourth Address A1, A0 First Second Third Fourth AddressFunction Truth Table for Read/Write 2Operating Range Maximum RatingsThermal Resistance11 Capacitance Switching Characteristics Over the Operating Range 12AC Test Loads and Waveforms Read/Write Waveforms 18, 19 Switching WaveformsAddress Hold after CLK Rise AD Hold after CLK RiseOrdering Information ZZ Mode Timing22NOP, Stall and Deselect Cycles18, 19 Lead Thin Plastic Quad Flatpack 14 x 20 x 1.4 mm A101 Package DiagramNew Datasheet Issue Date Orig. Description of Change 347377Document History