Cypress CY8C24894, CY8C24994, CY8C24094 manual Pin Part Pinout On-Chip Debug, Pin Part Pinout QFN

Page 11

CY8C24094, CY8C24794

CY8C24894, CY8C24994

8.1 68-Pin Part Pinout (On-Chip Debug)

The 68-pin QFN part table and drawing below is for the CY8C24094 On-Chip Debug (OCD) PSoC device. Note This part is only used for in-circuit debugging. It is NOT available for production.

Table 8-4. 68-Pin Part Pinout (QFN[2])

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure 8-4. CY8C24094 68-Pin OCD PSoC Device

 

 

 

Pin

Type

Name

Description

 

 

 

No.

Digital

Analog

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VREF

AGND

 

 

 

 

 

1

I/O

M

P4[7]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2

I/O

M

P4[5]

 

 

 

 

 

 

AI

AI

 

 

 

 

AI

AIO

AIO

AI

AI

AI

AI

AI

Ext. Ext. AI

 

 

 

3

I/O

M

P4[3]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

M,

M, M

M

M, M, M,

M,

M, M,

M,

M,

M, M, M,

 

 

 

4

I/O

M

P4[1]

 

 

 

 

 

 

P2[1],

P2[3],

P2[5],

P2[7],

P0[1],

P0[3],

P0[5],

P0[7], Vss Vdd

P0[6],

P0[4],

P0[2],

P0[0],

P2[6],

P2[4],

P2[2],

 

 

 

5

 

 

OCDE

OCD even data I/O.

 

 

 

 

 

 

 

 

6

 

 

OCDO

OCD odd data output.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

68 67

66 65

64

63 62

61 60 59

58

57 56

55

54

53 52

 

 

 

7

Power

 

Vss

Ground connection.

 

M, P4[7]

 

1

51

 

P2[0], M, AI

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

M, P4[5]

 

2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

50

 

P4[6], M

8

I/O

M

P3[7]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

M, P4[3]

 

3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

49

 

P4[4], M

9

I/O

M

P3[5]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

M, P4[1]

 

4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

48

 

P4[2], M

10

I/O

M

P3[3]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

OCDE

 

5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

47

 

P4[0], M

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

11

I/O

M

P3[1]

 

 

OCDO

 

6

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

46

 

XRES

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

12

I/O

M

P5[7]

 

 

 

Vss

 

7

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

45

 

CCLK

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

M, P3[7]

 

8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

44

 

HCLK

13

I/O

M

P5[5]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

QFN

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

M, P3[5]

 

9

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

43

 

P3[6], M

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

14

I/O

M

P5[3]

 

 

M, P3[3]

 

10

 

 

 

 

 

 

 

 

 

 

 

 

 

(Top View)

 

 

 

 

 

 

 

 

 

 

 

 

42

 

P3[4], M

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

15

I/O

M

P5[1]

 

 

M, P3[1]

 

11

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

41

 

P3[2], M

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

M, P5[7]

 

12

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

40

 

P3[0], M

16

I/O

M

P1[7]

I2C Serial Clock (SCL).

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

M, P5[5]

 

13

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

39

 

P5[6], M

17

I/O

M

P1[5]

I2C Serial Data (SDA).

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

M, P5[3]

 

14

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

38

 

P5[4], M

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

18

I/O

M

P1[3]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

M, P5[1]

 

15

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

37

 

P5[2], M

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

19

I/O

M

P1[1]

I2C Serial Clock (SCL), ISSP SCLK[1].

I2C SCL, M, P1[7]

 

16

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

36

 

P5[0], M

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

I2C SDA, M, P1[5]

 

17

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

35

 

P1[6], M

20

Power

 

Vss

Ground connection.

18 19

20

21 22

23

24 25 26 27

 

28 29 30

31

 

32 33

34

 

 

 

 

 

21

USB

 

D+

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

22

USB

 

D-

 

 

 

 

 

 

P1[3]

P1[1]

Vss

D +

D -

Vdd

P7[7]

P7[6] P7[5] P7[4]

P7[3]

P7[2]

P7[1]

P7[0]

P1[0]

P1[2]

P1[4]

 

 

 

23

Power

 

Vdd

Supply voltage.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

M,

M,

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

M,

M,

M,

 

 

 

24

I/O

 

P7[7]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SCL,I2C

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SDA,I2C

 

 

EXTCLK ,

 

25

I/O

 

P7[6]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

26

I/O

 

P7[5]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

27

I/O

 

P7[4]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

28

I/O

 

P7[3]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

29

I/O

 

P7[2]

 

Pin

Type

 

 

Name

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Description

 

 

 

 

 

30

I/O

 

P7[1]

 

No.

Digital

Analog

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

31

I/O

 

P7[0]

 

50

I/O

M

 

P4[6]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

32

I/O

M

P1[0]

I2C Serial Data (SDA), ISSP SDATA[1].

51

I/O

I,M

 

P2[0]

Direct switched capacitor block input.

 

 

 

33

I/O

M

P1[2]

 

52

I/O

I,M

 

P2[2]

Direct switched capacitor block input.

 

 

 

34

I/O

M

P1[4]

Optional External Clock Input (EXTCLK).

53

I/O

M

 

P2[4]

External Analog Ground (AGND) input.

 

35

I/O

M

P1[6]

 

54

I/O

M

 

P2[6]

External Voltage Reference (VREF) input.

 

36

I/O

M

P5[0]

 

55

I/O

I,M

 

P0[0]

Analog column mux input.

 

 

 

 

 

 

 

 

 

 

 

37

I/O

M

P5[2]

 

56

I/O

I,M

 

P0[2]

Analog column mux input and column output.

38

I/O

M

P5[4]

 

57

I/O

I,M

 

P0[4]

Analog column mux input and column output.

39

I/O

M

P5[6]

 

58

I/O

I,M

 

P0[6]

Analog column mux input.

 

 

 

 

 

 

 

 

 

 

 

40

I/O

M

P3[0]

 

59

Power

 

 

 

Vdd

 

 

Supply voltage.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

41

I/O

M

P3[2]

 

60

Power

 

 

 

Vss

 

 

Ground connection.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

42

I/O

M

P3[4]

 

61

I/O

I,M

 

P0[7]

Analog column mux input, integration input #1

43

I/O

M

P3[6]

 

62

I/O

I/O,M

 

P0[5]

Analog column mux input and column output,

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

integration input #2.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

44

 

 

HCLK

OCD high-speed clock output.

63

I/O

I/O,M

 

P0[3]

Analog column mux input and column output.

45

 

 

CCLK

OCD CPU clock output.

64

I/O

I,M

 

P0[1]

Analog column mux input.

 

 

 

 

 

 

 

 

 

 

 

46

Input

 

XRES

Active high pin reset with internal pull

65

I/O

M

 

P2[7]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

down.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

47

I/O

M

P4[0]

 

66

I/O

M

 

P2[5]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

48

I/O

M

P4[2]

 

67

I/O

I,M

 

P2[3]

Direct switched capacitor block input.

 

 

 

49

I/O

M

P4[4]

 

68

I/O

I,M

 

P2[1]

Direct switched capacitor block input.

 

 

 

LEGENDA = Analog, I = Input, O = Output, M = Analog Mux Input, OCD = On-Chip Debugger.

Document Number: 38-12018 Rev. *M

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Contents O C C O R E FeaturesLogic Block Diagram Cypress Semiconductor Corporation 198 Champion CourtPSoC Core PSoC Functional OverviewDigital System Analog Multiplexer System Analog SystemAdditional System Resources CyPros Consultants Solutions Library Technical SupportPSoC Device Characteristics Getting StartedIn-Circuit Emulator Development ToolsPSoC Designer Software Subsystems Select Components Configure ComponentsDesigning with PSoC Designer Organize and ConnectNumeric Naming Document ConventionsAcronyms Used Units of Measure56-Pin Part Pinout Pin InformationPin Type Name 56-Pin Part Pinout with XresPin Part Pinout QFN2 Pin Type Name Description Digital Analog 68-Pin Part PinoutPin Part Pinout QFN 68-Pin Part Pinout On-Chip DebugName Description Pin 100-Ball Vfbga Part PinoutBall Part Pinout Vfbga PinCY8C24094 OCD Not for Production 100-Ball Vfbga Part Pinout On-Chip DebugVss Ground connection D10 Pin Digital Analog Name Description 100-Pin Part Pinout On-Chip DebugPin Part Pinout Tqfp Tqfp Convention Description Register ReferenceRegister Conventions Register Mapping TablesRegister Map Bank 0 Table User Space Name Addr 0,Hex AccessAccess Name Addr 1,Hex Register Map Bank 1 Table Configuration SpaceAccess Name Units of Measure Symbol Unit of Measure Electrical SpecificationsAbsolute Maximum Ratings Operating TemperatureAbsolute Maximum Ratings Symbol Description Min Typ Units Operating Temperature Symbol Description Min Typ Max UnitsDC General Purpose I/O Specifications DC Electrical CharacteristicsDC Chip Level Specifications DC Operational Amplifier Specifications DC Full-Speed USB SpecificationsPsrroa DC Low Power Comparator SpecificationsPsrrob DC Analog Output Buffer SpecificationsTcvoso DC Analog Reference Specifications Capacitor Unit Value Switched Capacitor DC Analog PSoC Block SpecificationsVM20 = 111b DC POR and LVD SpecificationsDC Programming Specifications AC Chip-Level Specifications AC Electrical CharacteristicsAC Full-Speed USB Specifications AC General Purpose I/O SpecificationsBwoa AC Operational Amplifier SpecificationsTypical Agnd Noise with P24 Bypass AC Digital Block Specifications AC Low Power Comparator SpecificationsAC Analog Output Buffer Specifications AC External Clock SpecificationsAC Programming Specifications Definition for Timing for Fast/Standard Mode on the I2C Bus AC I2C SpecificationsPin 8x8 mm QFN Packaging DimensionsImportant Note Pin 8x8 mm x 0.89 mm QFNBall 6x6 mm Vfbga Vfbga Solder Reflow Peak TemperatureThermal Impedance Thermal Impedance for the Package Typical θJAEvaluation Tools Development Tool SelectionSoftware Pin Package Flex-Pod Kit18 Foot Kit19 Adapter20 Accessories Emulation and ProgrammingEmulation and Programming Accessories Device ProgrammersVFBGA21 Ordering InformationOrdering Code Definitions Document History USB Sales, Solutions, and Legal InformationWorldwide Sales and Design Support Products PSoC Solutions

CY8C24094, CY8C24894, CY8C24994 specifications

The Cypress CY8C24994, CY8C24894, and CY8C24094 are part of the PSoC (Cypress Semiconductor's Programmable System-on-Chip) family, designed to integrate numerous functions onto a single chip for efficient performance and flexibility in various applications.

One of the key features of these devices is their combination of analog and digital components, allowing designers to create a customized system without the need for extensive external circuitry. Each of these chips incorporates an Arm Cortex-M3 processor core, which provides a powerful 32-bit architecture, enabling efficient execution of 32-bit operations while maintaining low power consumption.

The CY8C24994 is the most advanced in this series, supporting up to 128 GPIO (General Purpose Input/Output) pins, which enhances connectivity options. It features multiple programmable analog blocks, including op-amps, comparators, and DACs (Digital-to-Analog Converters), making it suitable for a variety of sensor interfacing and signal processing applications. Additionally, it supports USB communication, providing further versatility for applications requiring data exchange with a host device.

The CY8C24894 presents a slightly more cost-effective solution with slightly fewer GPIO pins and integrated features. It maintains many of the same core attributes as its counterpart, delivering excellent analog performance and several programmable digital blocks. It is suitable for applications requiring moderate computational capabilities along with flexibility in terms of peripherals and interfaces.

The CY8C24094, while positioned as a more basic option within this lineup, still provides essential functionalities for simpler tasks. With fewer pins and capabilities, it is ideal for applications where size and cost are more critical than extensive processing power.

All three devices utilize Cypress's proprietary CapSense technology, enabling touch-sensing capabilities without the need for mechanical buttons. This feature not only enhances user interaction but also contributes to the overall design's robustness and longevity.

In summary, the CY8C24994, CY8C24894, and CY8C24094 PSoC chips offer ample design flexibility with integrated analog and digital functionality, making them an excellent choice for developers aiming to create innovative embedded solutions across a wide range of applications, from consumer electronics to industrial control systems.
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