Cypress CY8C24994 manual Designing with PSoC Designer, Organize and Connect, Select Components

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CY8C24094, CY8C24794 CY8C24894, CY8C24994

6. Designing with PSoC Designer

The development process for the PSoC device differs from that of a traditional fixed function microprocessor. The configurable analog and digital hardware blocks give the PSoC architecture a unique flexibility that pays dividends in managing specification change during development and by lowering inventory costs. These configurable resources, called PSoC Blocks, have the ability to implement a wide variety of user-selectable functions.

The PSoC development process can be summarized in the following four steps:

1.Select components

2.Configure components

3.Organize and Connect

4.Generate, Verify, and Debug

6.3 Organize and Connect

You can build signal chains at the chip level by interconnecting user modules to each other and the I/O pins, or connect system level inputs, outputs, and communication interfaces to each other with valuator functions.

In the system-level view, selecting a potentiometer driver to control a variable speed fan driver and setting up the valuators to control the fan speed based on input from the pot selects, places, routes, and configures a programmable gain amplifier (PGA) to buffer the input from the potentiometer, an analog to digital converter (ADC) to convert the potentiometer’s output to a digital signal, and a PWM to control the fan.

In the chip-level view, perform the selection, configuration, and routing so that you have complete control over the use of all on-chip resources.

6.1 Select Components

Both the system-level and chip-level views provide a library of prebuilt, pretested hardware peripheral components. In the system-level view, these components are called “drivers” and correspond to inputs (a thermistor, for example), outputs (a brushless DC fan, for example), communication interfaces (I2C-bus, for example), and the logic to control how they interact with one another (called valuators).

In the chip-level view, the components are called “user modules”. User modules make selecting and implementing peripheral devices simple, and come in analog, digital, and mixed signal varieties.

6.2 Configure Components

Each of the components you select establishes the basic register settings that implement the selected function. They also provide parameters and properties that allow you to tailor their precise configuration to your particular application. For example, a Pulse Width Modulator (PWM) User Module configures one or more digital PSoC blocks, one for each 8 bits of resolution. The user module parameters permit you to establish the pulse width and duty cycle. Configure the parameters and properties to correspond to your chosen application. Enter values directly or by selecting values from drop-down menus.

Both the system-level drivers and chip-level user modules are documented in data sheets that are viewed directly in the PSoC Designer. These data sheets explain the internal operation of the component and provide performance specifications. Each data sheet describes the use of each user module parameter or driver property, and other information you may need to successfully implement your design.

6.4 Generate, Verify, and Debug

When you are ready to test the hardware configuration or move on to developing code for the project, perform the “Generate Application” step. This causes PSoC Designer to generate source code that automatically configures the device to your specification and provides the software for the system.

Both system-level and chip-level designs generate software based on your design. The chip-level design provides application programming interfaces (APIs) with high level functions to control and respond to hardware events at run-time and interrupt service routines that you can adapt as needed. The system-level design also generates a C main() program that completely controls the chosen application and contains placeholders for custom code at strategic positions allowing you to further refine the software without disrupting the generated code.

A complete code development environment allows you to develop and customize your applications in C, assembly language, or both.

The last step in the development process takes place inside the PSoC Designer’s Debugger subsystem. The Debugger downloads the HEX image to the In-Circuit Emulator (ICE) where it runs at full speed. Debugger capabilities rival those of systems costing many times more. In addition to traditional single-step, run-to-breakpoint and watch-variable features, the Debugger provides a large trace buffer and allows you define complex breakpoint events that include monitoring address and data bus values, memory locations and external signals.

Document Number: 38-12018 Rev. *M

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Contents Cypress Semiconductor Corporation 198 Champion Court FeaturesLogic Block Diagram O C C O R EPSoC Functional Overview Digital SystemPSoC Core Analog System Analog Multiplexer SystemGetting Started CyPros Consultants Solutions Library Technical SupportPSoC Device Characteristics Additional System ResourcesDevelopment Tools PSoC Designer Software SubsystemsIn-Circuit Emulator Organize and Connect Configure ComponentsDesigning with PSoC Designer Select ComponentsUnits of Measure Document ConventionsAcronyms Used Numeric NamingPin Information 56-Pin Part Pinout56-Pin Part Pinout with Xres Pin Part Pinout QFN2Pin Type Name 68-Pin Part Pinout Pin Type Name Description Digital Analog68-Pin Part Pinout On-Chip Debug Pin Part Pinout QFNPin 100-Ball Vfbga Part PinoutBall Part Pinout Vfbga Name Description Pin100-Ball Vfbga Part Pinout On-Chip Debug CY8C24094 OCD Not for ProductionVss Ground connection D10 100-Pin Part Pinout On-Chip Debug Pin Part Pinout TqfpPin Digital Analog Name Description Tqfp Register Mapping Tables Register ReferenceRegister Conventions Convention DescriptionName Addr 0,Hex Access Register Map Bank 0 Table User SpaceRegister Map Bank 1 Table Configuration Space Access NameAccess Name Addr 1,Hex Electrical Specifications Units of Measure Symbol Unit of MeasureOperating Temperature Symbol Description Min Typ Max Units Operating TemperatureAbsolute Maximum Ratings Symbol Description Min Typ Units Absolute Maximum RatingsDC Electrical Characteristics DC Chip Level SpecificationsDC General Purpose I/O Specifications DC Full-Speed USB Specifications DC Operational Amplifier SpecificationsDC Low Power Comparator Specifications PsrroaDC Analog Output Buffer Specifications TcvosoPsrrob DC Analog Reference Specifications DC Analog PSoC Block Specifications Capacitor Unit Value Switched CapacitorDC POR and LVD Specifications VM20 = 111bDC Programming Specifications AC Electrical Characteristics AC Chip-Level SpecificationsAC General Purpose I/O Specifications AC Full-Speed USB SpecificationsAC Operational Amplifier Specifications BwoaTypical Agnd Noise with P24 Bypass AC Low Power Comparator Specifications AC Digital Block SpecificationsAC External Clock Specifications AC Analog Output Buffer SpecificationsAC Programming Specifications AC I2C Specifications Definition for Timing for Fast/Standard Mode on the I2C BusPackaging Dimensions Pin 8x8 mm QFNPin 8x8 mm x 0.89 mm QFN Important NoteBall 6x6 mm Vfbga Thermal Impedance for the Package Typical θJA Solder Reflow Peak TemperatureThermal Impedance VfbgaDevelopment Tool Selection SoftwareEvaluation Tools Device Programmers Accessories Emulation and ProgrammingEmulation and Programming Accessories Pin Package Flex-Pod Kit18 Foot Kit19 Adapter20Ordering Information VFBGA21Ordering Code Definitions Document History Sales, Solutions, and Legal Information Worldwide Sales and Design Support Products PSoC SolutionsUSB

CY8C24094, CY8C24894, CY8C24994 specifications

The Cypress CY8C24994, CY8C24894, and CY8C24094 are part of the PSoC (Cypress Semiconductor's Programmable System-on-Chip) family, designed to integrate numerous functions onto a single chip for efficient performance and flexibility in various applications.

One of the key features of these devices is their combination of analog and digital components, allowing designers to create a customized system without the need for extensive external circuitry. Each of these chips incorporates an Arm Cortex-M3 processor core, which provides a powerful 32-bit architecture, enabling efficient execution of 32-bit operations while maintaining low power consumption.

The CY8C24994 is the most advanced in this series, supporting up to 128 GPIO (General Purpose Input/Output) pins, which enhances connectivity options. It features multiple programmable analog blocks, including op-amps, comparators, and DACs (Digital-to-Analog Converters), making it suitable for a variety of sensor interfacing and signal processing applications. Additionally, it supports USB communication, providing further versatility for applications requiring data exchange with a host device.

The CY8C24894 presents a slightly more cost-effective solution with slightly fewer GPIO pins and integrated features. It maintains many of the same core attributes as its counterpart, delivering excellent analog performance and several programmable digital blocks. It is suitable for applications requiring moderate computational capabilities along with flexibility in terms of peripherals and interfaces.

The CY8C24094, while positioned as a more basic option within this lineup, still provides essential functionalities for simpler tasks. With fewer pins and capabilities, it is ideal for applications where size and cost are more critical than extensive processing power.

All three devices utilize Cypress's proprietary CapSense technology, enabling touch-sensing capabilities without the need for mechanical buttons. This feature not only enhances user interaction but also contributes to the overall design's robustness and longevity.

In summary, the CY8C24994, CY8C24894, and CY8C24094 PSoC chips offer ample design flexibility with integrated analog and digital functionality, making them an excellent choice for developers aiming to create innovative embedded solutions across a wide range of applications, from consumer electronics to industrial control systems.
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