Cypress CY8C24894, CY8C24994, CY8C24094 manual DC Analog Reference Specifications

Page 26

CY8C24094, CY8C24794

CY8C24894, CY8C24994

10.3.7 DC Analog Reference Specifications

The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and -40°C TA 85°C, or 3.0V to 3.6V and -40°C TA 85°C, respectively. Typical parameters apply to 5V and 3.3V at 25°C and are for design guidance only.

The guaranteed specifications are measured through the Analog Continuous Time PSoC blocks. The power levels for AGND refer to the power of the Analog Continuous Time PSoC block. The power levels for RefHi and RefLo refer to the Analog Reference Control register. The limits stated for AGND include the offset error of the AGND buffer local to the Analog Continuous Time PSoC block. Reference control power is high.

Table 10-11. 5V DC Analog Reference Specifications

Symbol

Description

Min

Typ

Max

Units

 

BG

Bandgap Voltage Reference

1.28

1.30

1.32

V

 

AGND = Vdd/2[4, 5]

Vdd/2 - 0.04

Vdd/2 - 0.01

Vdd/2 + 0.007

V

 

AGND = 2 x BandGap[4, 5]

2 x BG - 0.048

2 x BG - 0.030

2 x BG + 0.024

V

 

AGND = P2[4] (P2[4] = Vdd/2)[4, 5]

P2[4] - 0.011

P2[4]

P2[4] + 0.011

V

 

AGND = BandGap[4, 5]

BG - 0.009

BG + 0.008

BG + 0.016

V

 

AGND = 1.6 x BandGap[4, 5]

1.6 x BG - 0.022

1.6 x BG - 0.010

1.6 x BG + 0.018

V

 

AGND Block to Block Variation (AGND = Vdd/2)[4, 5]

-0.034

0.000

0.034

V

 

RefHi = Vdd/2 + BandGap

Vdd/2 + BG - 0.10

Vdd/2 + BG

Vdd/2 + BG + 0.10

V

 

RefHi = 3 x BandGap

3 x BG - 0.06

3 x BG

3 x BG + 0.06

V

 

RefHi = 2 x BandGap + P2[6] (P2[6] = 1.3V)

2 x BG + P2[6] -

2 x BG + P2[6] -

2 x BG + P2[6] +

V

 

 

 

0.113

0.018

0.077

 

 

RefHi = P2[4] + BandGap (P2[4] = Vdd/2)

P2[4] + BG - 0.130

P2[4] + BG - 0.016

P2[4] + BG + 0.098

V

 

RefHi = P2[4] + P2[6] (P2[4] = Vdd/2, P2[6] = 1.3V)

P2[4] + P2[6] -

P2[4] + P2[6] -

P2[4] + P2[6]+

V

 

 

 

0.133

0.016

0.100

 

 

RefHi = 3.2 x BandGap

3.2 x BG - 0.112

3.2 x BG

3.2 x BG + 0.076

V

 

RefLo = Vdd/2 – BandGap

Vdd/2 - BG - 0.04

Vdd/2 - BG + 0.024

Vdd/2 - BG + 0.04

V

 

RefLo = BandGap

BG - 0.06

BG

BG + 0.06

V

 

RefLo = 2 x BandGap - P2[6] (P2[6] = 1.3V)

2 x BG - P2[6] -

2 x BG - P2[6] +

2 x BG - P2[6] +

V

 

 

 

0.084

0.025

0.134

 

 

RefLo = P2[4] – BandGap (P2[4] = Vdd/2)

P2[4] - BG - 0.056

P2[4] - BG + 0.026

P2[4] - BG + 0.107

V

 

RefLo = P2[4]-P2[6] (P2[4] = Vdd/2, P2[6] = 1.3V)

P2[4] - P2[6] -

P2[4] - P2[6] +

P2[4] - P2[6] +

V

 

 

 

0.057

0.026

0.110

 

 

Table 10-12. 3.3V DC Analog Reference Specifications

 

 

 

 

 

 

 

 

 

 

 

 

Symbol

Description

Min

Typ

Max

Units

 

BG

Bandgap Voltage Reference

1.28

1.30

1.32

V

 

AGND = Vdd/2[4, 5]

Vdd/2 - 0.03

Vdd/2 - 0.01

Vdd/2 + 0.005

V

 

AGND = 2 x BandGap[4, 5]

Not Allowed

 

 

 

 

AGND = P2[4] (P2[4] = Vdd/2)

P2[4] - 0.008

P2[4] + 0.001

P2[4] + 0.009

V

 

AGND = BandGap[4, 5]

BG - 0.009

BG + 0.005

BG + 0.015

V

 

AGND = 1.6 x BandGap[4, 5]

1.6 x BG - 0.027

1.6 x BG - 0.010

1.6 x BG + 0.018

V

 

AGND Column to Column Variation (AGND =

-0.034

0.000

0.034

V

 

 

Vdd/2)[4, 5]

 

 

 

 

 

RefHi = Vdd/2 + BandGap

Not Allowed

 

 

 

 

RefHi = 3 x BandGap

Not Allowed

 

 

 

 

RefHi = 2 x BandGap + P2[6] (P2[6] = 0.5V)

Not Allowed

 

 

 

 

RefHi = P2[4] + BandGap (P2[4] = Vdd/2)

Not Allowed

 

 

 

 

RefHi = P2[4] + P2[6] (P2[4] = Vdd/2, P2[6] = 0.5V)

P2[4] + P2[6] -

P2[4] + P2[6] -

P2[4] + P2[6] +

V

 

 

 

0.075

0.009

0.057

 

 

Document Number: 38-12018 Rev. *M

 

 

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Contents Cypress Semiconductor Corporation 198 Champion Court FeaturesLogic Block Diagram O C C O R EPSoC Core PSoC Functional OverviewDigital System Analog System Analog Multiplexer SystemGetting Started CyPros Consultants Solutions Library Technical SupportPSoC Device Characteristics Additional System ResourcesIn-Circuit Emulator Development ToolsPSoC Designer Software Subsystems Organize and Connect Configure ComponentsDesigning with PSoC Designer Select ComponentsUnits of Measure Document ConventionsAcronyms Used Numeric NamingPin Information 56-Pin Part PinoutPin Type Name 56-Pin Part Pinout with XresPin Part Pinout QFN2 68-Pin Part Pinout Pin Type Name Description Digital Analog68-Pin Part Pinout On-Chip Debug Pin Part Pinout QFNPin 100-Ball Vfbga Part PinoutBall Part Pinout Vfbga Name Description Pin100-Ball Vfbga Part Pinout On-Chip Debug CY8C24094 OCD Not for ProductionVss Ground connection D10 Pin Digital Analog Name Description 100-Pin Part Pinout On-Chip DebugPin Part Pinout Tqfp Tqfp Register Mapping Tables Register ReferenceRegister Conventions Convention DescriptionName Addr 0,Hex Access Register Map Bank 0 Table User SpaceAccess Name Addr 1,Hex Register Map Bank 1 Table Configuration SpaceAccess Name Electrical Specifications Units of Measure Symbol Unit of MeasureOperating Temperature Symbol Description Min Typ Max Units Operating TemperatureAbsolute Maximum Ratings Symbol Description Min Typ Units Absolute Maximum RatingsDC General Purpose I/O Specifications DC Electrical CharacteristicsDC Chip Level Specifications DC Full-Speed USB Specifications DC Operational Amplifier SpecificationsDC Low Power Comparator Specifications PsrroaPsrrob DC Analog Output Buffer SpecificationsTcvoso DC Analog Reference Specifications DC Analog PSoC Block Specifications Capacitor Unit Value Switched CapacitorDC POR and LVD Specifications VM20 = 111bDC Programming Specifications AC Electrical Characteristics AC Chip-Level SpecificationsAC General Purpose I/O Specifications AC Full-Speed USB SpecificationsAC Operational Amplifier Specifications BwoaTypical Agnd Noise with P24 Bypass AC Low Power Comparator Specifications AC Digital Block SpecificationsAC External Clock Specifications AC Analog Output Buffer SpecificationsAC Programming Specifications AC I2C Specifications Definition for Timing for Fast/Standard Mode on the I2C BusPackaging Dimensions Pin 8x8 mm QFNPin 8x8 mm x 0.89 mm QFN Important NoteBall 6x6 mm Vfbga Thermal Impedance for the Package Typical θJA Solder Reflow Peak TemperatureThermal Impedance VfbgaEvaluation Tools Development Tool SelectionSoftware Device Programmers Accessories Emulation and ProgrammingEmulation and Programming Accessories Pin Package Flex-Pod Kit18 Foot Kit19 Adapter20Ordering Information VFBGA21Ordering Code Definitions Document History USB Sales, Solutions, and Legal InformationWorldwide Sales and Design Support Products PSoC Solutions

CY8C24094, CY8C24894, CY8C24994 specifications

The Cypress CY8C24994, CY8C24894, and CY8C24094 are part of the PSoC (Cypress Semiconductor's Programmable System-on-Chip) family, designed to integrate numerous functions onto a single chip for efficient performance and flexibility in various applications.

One of the key features of these devices is their combination of analog and digital components, allowing designers to create a customized system without the need for extensive external circuitry. Each of these chips incorporates an Arm Cortex-M3 processor core, which provides a powerful 32-bit architecture, enabling efficient execution of 32-bit operations while maintaining low power consumption.

The CY8C24994 is the most advanced in this series, supporting up to 128 GPIO (General Purpose Input/Output) pins, which enhances connectivity options. It features multiple programmable analog blocks, including op-amps, comparators, and DACs (Digital-to-Analog Converters), making it suitable for a variety of sensor interfacing and signal processing applications. Additionally, it supports USB communication, providing further versatility for applications requiring data exchange with a host device.

The CY8C24894 presents a slightly more cost-effective solution with slightly fewer GPIO pins and integrated features. It maintains many of the same core attributes as its counterpart, delivering excellent analog performance and several programmable digital blocks. It is suitable for applications requiring moderate computational capabilities along with flexibility in terms of peripherals and interfaces.

The CY8C24094, while positioned as a more basic option within this lineup, still provides essential functionalities for simpler tasks. With fewer pins and capabilities, it is ideal for applications where size and cost are more critical than extensive processing power.

All three devices utilize Cypress's proprietary CapSense technology, enabling touch-sensing capabilities without the need for mechanical buttons. This feature not only enhances user interaction but also contributes to the overall design's robustness and longevity.

In summary, the CY8C24994, CY8C24894, and CY8C24094 PSoC chips offer ample design flexibility with integrated analog and digital functionality, making them an excellent choice for developers aiming to create innovative embedded solutions across a wide range of applications, from consumer electronics to industrial control systems.