Cypress CYV15G0101EQ manual Document History, See ECN FRE, See ECN UKK/AESA

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CYV15G0101EQ

Document History Page

Document Title: CYV15G0101EQ Multi Rate Video Cable Equalizer

Document Number: 001-04184

REV.

ECN NO.

ISSUE

ORIG. OF

DESCRIPTION OF CHANGE

DATE

CHANGE

 

 

 

 

 

 

 

 

**

389196

SEE ECN

BCD

New preliminary datasheet

 

 

 

 

 

*A

394763

SEE ECN

BCD

Updated preliminary datasheet for release to the internet

 

 

 

 

 

*B

431556

SEE ECN

BCD

Changed AC and DC parameters

 

 

 

 

 

*C

504487

SEE ECN

FRE

Updated AC and DC parameters. Changed datasheet status from

 

 

 

 

preliminary to final

*D

514998

SEE ECN

FRE

Fixed typo in diagrams on page 2

 

 

 

 

 

*E

1396423

SEE ECN

UKK/AESA

Updated AC and DC electrical characteristics and pin description of

 

 

 

 

MCLADJ and CD.

© Cypress Semiconductor Corporation, 2007. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress.

Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Use may be limited by and subject to the applicable Cypress software license agreement.

Document Number: 001-04184 Rev. *E

Revised October 25, 2007

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PSoC Designer™, Programmable System-on-Chip™, and PSoC Express™ are trademarks and PSoC® is a registered trademark of Cypress Semiconductor Corp. All other trademarks or registered trademarks referenced herein are property of the respective corporations. Purchase of I2C components from Cypress or one of its sublicensed Associated Companies conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips. HOTLink II is a trademark of Cypress Semiconductor Corp. All other trademarks or registered trademarks referenced herein are property of the respective corporations. All products and company names mentioned in this document may be the trademarks of their respective holders.

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Contents Features Functional DescriptionEqualizer Block Diagram PinoutsCD/MUTE CLILvttl IO McladjEqualizer Operation SDI, SDIOperating Range DC Electrical CharacteristicsMaximum Ratings Jedec EIA/JESD-A114AAC Electrical Characteristics Typical Performance Graphs Unless otherwise stated, VCC = 3.3V, TA = 25CTypical Application Circuit CYV15G0101DXBCYV15G0101EQ-SXC Package DimensionOrdering Information Pb-free 16-Pin 150 Mil SoicSee ECN FRE Document HistorySee ECN See ECN UKK/AESA