Cypress CY62167EV30 manual Pin Tsop I 12 mm x 18.4 mm x 1.0 mm

Page 12

CY62167EV30 MoBL®

Package Diagrams (continued)

Figure 13. 48-Pin TSOP I (12 mm x 18.4 mm x 1.0 mm), 51-85183

DIMENSIONS IN INCHES[MM] MIN.

MAX.

JEDEC # MO-142

0.037[0.95]

0.041[1.05]

1

0.004[0.10]

0.008[0.21]

0° -5°

0.724 [18.40]

0.787[20.00]

0.020[0.50]

0.028[0.70]

N

0.472[12.00]

0.047[1.20]

MAX.

0.010[0.25]

GAUGE PLANE

0.020[0.50]

TYP.

0.007[0.17]

0.011[0.27]

0.002[0.05]

0.006[0.15]

SEATING PLANE	0.004[0.10]

51-85183-*A

Document #: 38-05446 Rev. *E

Page 12 of 14

[+] Feedback

Image 12

Contents Features Logic Block DiagramFunctional Description Cypress Semiconductor Corporation 198 Champion CourtPin Configuration Product PortfolioMin Typ5 Max CY62167EV30LL BLE BHEElectrical Characteristics Maximum RatingsOperating Range CapacitanceData Retention Characteristics Thermal ResistanceVfbga Tsop Switching Characteristics Parameter Description Ns Industrial/Auto-A Unit MinRead Cycle BHESwitching Waveforms Shows WE controlled write cycle waveforms.18, 22 Data I/O Valid DataShows CE1 or CE2 controlled write cycle waveforms.18, 22 Inputs/Outputs Mode Power Truth TableCE1 CE2 BHE BLE Package Diagrams Ordering InformationBall Vfbga 6 x 8 x 1 mm Pin Tsop I 12 mm x 18.4 mm x 1.0 mm Document History REV ECN noOrig. Submission Change Date Description of Change Sales, Solutions, and Legal Information USB