Cypress CY62167EV30 manual Ball Vfbga 6 x 8 x 1 mm

Page 11

CY62167EV30 MoBL®

Package Diagrams (continued)

Figure 12. 48-Ball VFBGA (6 x 8 x 1 mm), 51-85150

TOP VIEW

BOTTOM VIEW

 

A1 CORNER

0.25 C

 

 

 

 

 

A

 

 

 

 

 

B

 

 

8.00±0.10

 

 

 

C

 

 

 

D

 

 

 

 

 

E

 

 

 

 

 

F

 

 

 

 

 

G

 

 

 

 

 

H

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A

 

 

 

 

 

 

 

 

 

 

 

 

 

 

B

 

 

 

0.55 MAX.

A1 CORNER

1 2 3 4 5 6

6.00±0.10

0.21±0.05

0.10 C

8.00±0.10

A

 

Ø0.05 M C

 

 

 

 

 

Ø0.25 M C A B

 

 

 

 

Ø0.30±0.05(48X)

 

 

 

 

6

5

4

3

2

1

 

 

 

 

 

 

A

 

 

 

 

 

 

B

 

0.75

 

 

 

 

C

5.25

 

 

 

 

D

 

 

 

 

E

 

 

 

 

 

 

 

2.625

 

 

 

 

F

 

 

 

 

 

G

 

 

 

 

 

 

 

 

 

 

 

 

H

 

 

1.875

 

 

 

 

 

 

 

0.75

 

 

 

 

 

 

3.75

 

 

 

B

6.00±0.10

 

 

 

0.15(4X)

 

 

 

 

 

0.26 MAX.

SEATING PLANE

C

1.00 MAX

51-85150-*D

Document #: 38-05446 Rev. *E

Page 11 of 14

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Contents Cypress Semiconductor Corporation 198 Champion Court FeaturesLogic Block Diagram Functional DescriptionBLE BHE Pin ConfigurationProduct Portfolio Min Typ5 Max CY62167EV30LLCapacitance Electrical CharacteristicsMaximum Ratings Operating RangeVfbga Tsop Data Retention CharacteristicsThermal Resistance BHE Switching CharacteristicsParameter Description Ns Industrial/Auto-A Unit Min Read CycleSwitching Waveforms Data I/O Valid Data Shows WE controlled write cycle waveforms.18, 22Shows CE1 or CE2 controlled write cycle waveforms.18, 22 CE1 CE2 BHE BLE Inputs/Outputs Mode PowerTruth Table Ordering Information Package DiagramsBall Vfbga 6 x 8 x 1 mm Pin Tsop I 12 mm x 18.4 mm x 1.0 mm Orig. Submission Change Date Description of Change Document HistoryREV ECN no USB Sales, Solutions, and Legal Information