Cypress CY62158E Switching Waveforms, Shows address transition controlled read cycle waveforms.13

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CY62158E MoBL

Switching Waveforms

Figure 4 shows address transition controlled read cycle waveforms.[13, 14]

Figure 4. Read Cycle No. 1

ADDRESS

tOHA

tRC

tAA

DATA OUT

PREVIOUS DATA VALID

DATA VALID

Figure 5 shows OE controlled read cycle waveforms.[14, 15]

 

 

 

 

Figure 5. Read Cycle No. 2

 

 

 

ADDRESS

 

 

 

 

CE1

tRC

 

 

 

 

 

 

 

CE2

 

 

 

 

 

tACE

 

 

 

OE

 

 

 

 

 

tDOE

tHZOE

 

 

 

tHZCE

 

 

 

tLZOE

HIGH

 

DATA OUT

HIGH IMPEDANCE

 

IMPEDANCE

DATA VALID

 

 

 

 

 

 

 

VCC

tLZCE

tPD

 

 

t

I

CC

SUPPLY

PU

 

50%

50%

 

 

CURRENT

 

 

ISB

Notes

13.Device is continuously selected. OE, CE1 = VIL, CE2 = VIH.

14.WE is HIGH for read cycle.

15.Address valid before or similar to CE1 transition LOW and CE2 transition HIGH.

Document #: 38-05684 Rev. *D

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Contents Functional Description FeaturesLogic Block Diagram Cypress Semiconductor Corporation 198 Champion CourtPin Configuration Product PortfolioMin Typ Operating Range Electrical CharacteristicsMaximum Ratings CapacitanceData Retention Characteristics Parameters UnitParameter Description Conditions Min Typ Max Unit Parameter Description 45 ns Unit Min Read CycleWrite Cycle Switching Waveforms Shows address transition controlled read cycle waveforms.13Write Cycle No Inputs/Outputs Mode Power Ordering InformationPackage Diagrams Issue Date Orig. Change Description of Change Document History