Cypress CY62167E MoBL manual Shows WE controlled write cycle waveforms.17, 21, Data IO Valid Data

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CY62167E MoBL®

Switching Waveforms (continued)

Figure 3 shows WE controlled write cycle waveforms.[17, 21, 22]

Figure 3. Write Cycle No. 1

 

 

tWC

ADDRESS

 

 

 

 

tSCE

CE1

 

 

CE2

 

 

 

tAW

tHA

WE

tSA

tPWE

 

 

BHE/BLE

 

tBW

 

 

OE

 

tHD

 

 

tSD

DATA IO

NOTE 23

VALID DATA

 

tHZOE

 

Notes

21.Data IO is high impedance if OE = VIH.

22.If CE1 goes HIGH and CE2 goes LOW simultaneously with WE = VIH, the output remains in a high impedance state.

23.During this period the IOs are in output state and input signals must not be applied.

Document #: 001-15607 Rev. *A

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Contents Cypress Semiconductor Corporation FeaturesLogic Block Diagram Functional Description1Min Pin Configuration 2Product Portfolio Pin Tsop I Top ViewCapacitance Electrical CharacteristicsMaximum Ratings Operating RangeParameters Values Unit Data Retention CharacteristicsAC Test Loads and Waveforms Data Retention Waveform12Write Cycle Switching CharacteristicsParameter Description 45 ns Unit Min Max Read CycleSwitching Waveforms Data IO Valid Data Shows WE controlled write cycle waveforms.17, 21Shows CE1 or CE2 controlled write cycle waveforms.17, 21 Shows BHE/BLE controlled, OE LOW write cycle waveforms.22 BHE BLE Inputs Outputs Mode PowerTruth Table Ordering InformationPin Tsop I 12 mm x 18.4 mm x 1.0 mm Package DiagramDocument History Issue Date Orig. Change Description of ChangeREV ECN no