Cypress CY14E108N, CY14B102N manual Pin Definitions

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ADVANCE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CY14E108L, CY14E108N

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Pin Definitions

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Pin Name

IO Type

 

 

 

 

Description

A0 – A19

Input

Address Inputs Used to Select One of the 1,048,576 bytes of the nvSRAM for x8 Configuration.

A0 – A18

 

Address Inputs Used to Select One of the 524, 288 bytes of the nvSRAM for x16 Configuration.

DQ0 – DQ7

Input/Output

Bidirectional Data IO Lines for x8 Configuration. Used as input or output lines depending on

 

 

 

 

 

 

 

 

 

operation.

 

 

 

DQ0 – DQ15

 

Bidirectional Data IO Lines for x16 Configuration. Used as input or output lines depending on

 

 

 

 

 

 

 

 

 

operation.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Input

Write Enable Input, Active LOW. When selected LOW, data on the IO pins is written to the address

 

 

WE

 

 

 

 

 

 

 

 

 

location latched by the falling edge of CE.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Input

Chip Enable Input, Active LOW. When LOW, selects the chip. When HIGH, deselects the chip.

 

 

CE

 

 

 

 

 

 

 

 

Input

Output Enable, Active LOW. The active LOW

 

input enables the data output buffers during read

 

 

 

 

 

 

 

OE

 

 

OE

 

 

 

 

 

 

 

 

 

cycles. IO pins are tri-stated on deasserting OE high.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Input

Byte High Enable, Active LOW. Controls DQ15 - DQ8.

 

BHE

 

 

 

 

 

 

 

Input

Byte Low Enable, Active LOW. Controls DQ7 - DQ0.

 

BLE

 

VSS

Ground

Ground for the Device. Must be connected to the ground of the system.

 

VCC

Power Supply

Power Supply Inputs to the Device.

 

 

 

 

 

 

 

 

Input/Output

Hardware Store Busy

 

. When LOW this output indicates that a hardware store is in progress.

 

 

 

 

 

 

 

 

(HSB)

 

HSB

 

 

 

 

 

 

 

 

 

When pulled LOW external to the chip it initiates a nonvolatile STORE operation. A weak internal pull

 

 

 

 

 

 

 

 

 

up resistor keeps this pin HIGH if not connected (connection optional).

 

 

 

VCAP

Power Supply

AutoStore Capacitor. Supplies power to the nvSRAM during power loss to store data from the SRAM

 

 

 

 

 

 

 

 

 

to nonvolatile elements.

 

 

 

 

 

 

 

NC

No Connect

No Connect. Do not connect this pin to the die.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Document Number: 001-45524 Rev. *A

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Contents Cypress Semiconductor Corporation 198 Champion Court FeaturesLogic Block Diagram Functional DescriptionPinouts X16Top View Not to scale Pin Definitions Sram Write Hardware Recall Power UpDevice Operation Sram ReadSoftware Recall Mode SelectionA15 A0 Mode Power Software StoreNoise Considerations Mode Selection A15 A0 PowerPreventing AutoStore Data ProtectionRange DC Electrical CharacteristicsMaximum Ratings Operating RangeParameter Description Test Conditions Max Unit CapacitanceThermal Resistance AC Test ConditionsAC Switching Characteristics Sram Read CycleSram Write Cycle AutoStore and Power Up Recall Software Controlled Store and Recall CycleHardware Store Cycle Sram Write Cycle #1 WE Controlled 13, 21, 22 Sram Write Cycle #2 CE Controlled13, 21, 22 Α α Hardware Store Cycle20 Ordering Information CY 14 E 108 L ZS P 20 X C T Part Numbering NomenclaturePin Tsop II Package DiagramsBall Fbga 6 mm x 10 mm x 1.2 mm 51-85160 Sales, Solutions, and Legal Information Document HistorySubmission Orig. Description of Change Date

CY14E108N, CY14B102N specifications

Cypress Semiconductor, a leader in embedded memory solutions, offers a range of non-volatile memory products, among which the CY14B102N and CY14E108N stand out due to their advanced features and robust technology. Both devices are part of Cypress's NVSRAM (Non-Volatile Static Random Access Memory) family, combining the reliability of SRAM with the non-volatility of EEPROM.

The CY14B102N is a 1 Megabit (128 Kilobyte) NVSRAM that utilizes a 2.5V to 3.6V power supply. It features a fast access time of 45 ns, making it suitable for high-speed applications. This device offers a unique advantage by providing data retention for up to 20 years without the need for battery backups, ensuring critical information remains intact even in power-off situations. The CY14B102N also incorporates write cycling endurance rated for over a million cycles, which is ideal for applications requiring frequent data updates.

On the other hand, the CY14E108N features 8 Megabits (1 Megabyte) of NVSRAM, operating at a power supply voltage range of 3.0V to 3.6V. It is designed for higher density applications, while still achieving fast access times of 45 ns. The data retention performance of the CY14E108N similarly allows for up to 20 years of stable data storage under power-off conditions. The device supports a wide range of serial interface protocols, further enhancing its integration capabilities with various microcontrollers and systems.

Both devices implement Cypress's proprietary technology that enables nearly instant data access without requiring a dedicated battery. This makes them suitable for applications in automotive, industrial, consumer, and telecommunications sectors, where maintaining data integrity is critical. The combination of high speed, endurance, and data retention makes the CY14B102N and CY14E108N ideal for systems requiring fast and reliable data storage.

Furthermore, the compatibility of these devices with standard SRAM interfaces ensures seamless integration into existing designs, minimizing design complexity. With their advanced features and reliable performance, Cypress's NVSRAM products provide a compelling solution for high-performance non-volatile memory needs in modern electronic systems.