Connect Tech 104 user manual Configuring the Fpga with the SPI Flash

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Connect Tech FreeForm/PCI-104 User Manual

Configuring the FPGA with the SPI Flash

In previous Xilinx FPGA configurations, the SPI flash would require programming via 3rd party JTAG test software or through in-system methods. The following features are new to ISE 9.1/9.2, and are only available on select FPGAs, including the Virtex-5. Your FreeForm/PCI-104 card featuring the Xilinx Virtex-5 FPGA includes a standard core to enable programming of BPI and SPI flashes over JTAG.

Configuring the FPGA / SPI flash Association

1) Select “Boundary Scan” from the “Flows” tab.

2) Right click on the FPGA and select “Add SPI Flash…”

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Contents FreeForm/PCI-104 Trademark Acknowledgment Limited Lifetime WarrantyCopyright Notice Customer Support Overview Contact InformationTelephone/Facsimile Email/InternetTable of Contents List of Tables List of FiguresFeatures IntroductionJumpers /Switches Description Components DescriptionHardware Description and Configuration Jumpers and SwitchesSlot Selection RSW1 Position Fpga Configuration Settings J1 Slot Selection RSW1Connector Pinouts External Power Connector Pinout P8 Signal Direction External Power ConnectionGpio Header Pinout Signal Direction Gpio Header P7Hardware Installation Software InstallationStandalone Operation Fpga Development EnvironmentFpga Configuration Launch ImpactPage Page Programming the Fpga Generating a Prom MCS File Page Revision Configuring the Fpga with the SPI Flash Configuring the Fpga / SPI flash AssociationPage Programming the Flash Elapsed time = Reference Design FunctionalityMemory Map Bar Local Address Space 0 BarImplementation Local Address Space 1 BarSpecifications
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