Connect Tech 104 user manual Hardware Installation, Standalone Operation, Software Installation

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Connect Tech FreeForm/PCI-104 User Manual

Hardware Installation

Before installing the FreeForm/PCI-104 into a PC/104 stack, ensure the following:

oSlot selection properly set using the rotary switch RSW1. Note that the FreeForm/PCI-104 address space consumes 32 bytes.

oFPGA configuration jumper J1 is set to read from Flash

Once installed in the system and power is applied, the LED D1 will illuminate to indicate that FreeForm/PCI-104 is functioning properly.

Standalone Operation

Operating the FreeForm/PCI-104 outside of a PCI-104 stack or a PCI system for extended periods of time is not recommended. The PCI to local bus bridge (PLX 9056) requires the pull-up / pull-down resistors provided on a system main board.

Configuring / programming the FreeForm/PCI-104 in standalone mode is acceptable, providing it is not left powered in that state.

Software Installation

FPGA Development Environment

FreeForm/PCI-104 has been developed with Xilinx WebPACK 9.2, available free of charge at:

http://www.xilinx.com/ise/logic_design_prod/webpack.htm

Drivers and Application Examples

The FreeForm/PCI-104 ships with a CD containing drivers for various operating systems and example programs to help quickly develop applications. Refer to the CD for installation instructions. For other operating systems, please check the Connect Tech website’s download zone:

http://www.connecttech.com/asp/Support/DownloadZone.asp

Revision 0.00

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Contents FreeForm/PCI-104 Limited Lifetime Warranty Copyright NoticeTrademark Acknowledgment Customer Support Overview Contact InformationTelephone/Facsimile Email/InternetTable of Contents List of Tables List of FiguresFeatures IntroductionJumpers /Switches Description Components DescriptionHardware Description and Configuration Jumpers and SwitchesSlot Selection RSW1 Position Fpga Configuration Settings J1 Slot Selection RSW1Connector Pinouts External Power Connector Pinout P8 Signal Direction External Power ConnectionGpio Header Pinout Signal Direction Gpio Header P7Hardware Installation Software InstallationStandalone Operation Fpga Development EnvironmentFpga Configuration Launch ImpactPage Page Programming the Fpga Generating a Prom MCS File Page Revision Configuring the Fpga with the SPI Flash Configuring the Fpga / SPI flash AssociationPage Programming the Flash Elapsed time = Reference Design FunctionalityMemory Map Bar Local Address Space 0 BarImplementation Local Address Space 1 BarSpecifications
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