RAD Data comm operation manual ASM-10/8 Block Diagram, 6shows the ASM-10/8 internal circuitry

Page 22

Chapter 1. Introduction	ASM-10/8Installation and Operation Manual

ASM-10/8 Block Diagram

Figure 1-6shows the ASM-10/8 internal circuitry.

RTS

CTS

TXC

EXT.

CLK

REM LOOP 2

TXD

RV CLK

	RLB
COMMAND
GENERATOR
	SYNC
ASYNC TO
SYNC CONV	ASYNC
	ASYNC

ENCODER

CONTROL

MODULATOR
MODULATOR		POWER
TIMING		SUPPLY

RPF

GENERATOR (ASM-10-SA

ONLY)

SELECTABLE

XMT AMPLIFIER

ENCODER

MODULATOR

DIG LPBK

XMT

LOOP 3

ANA LOOP

RCV RLB

RLB

COMMAND

DECODER

104 (BB) RXD

115 (BB) RXC

DECODER

TIMING

RECOVERY

ANALPBK

				RCV
AUTOMATIC				RCV
AUTOMATIC				FILTER
EQUALIZER				FILTER
EQUALIZER


AGC

2W

4W

RCV

109 (CF) DCD		CARRIER	DATA RATE
		DETECT	DATA RATE
		DETECT
RPF LED
PIN 22		RPF
	RPF RESET	DECODER
PIN 11	RPF RESET	(ASM-10-R
		ONLY)

Figure 1-6 ASM-10/8 Block Diagram

1-8 Functional Description

Image 22

Contents

ASM-10/8 International Headquarters RAD Data Communications IncPage Warranty Safety Warnings Safety Status PortsSafety Supplementary InformationPage Jumper Settings QS.1 Installing ASM-10/8Switch Jumper Possible Settings Default SettingRPF OFF QS.2 Operating ASM-10/8 Quick Start Guide Operating ASM-10/8 Rqwhqwv +$3757528%/6+227,1*$1,$*1267,&6 Lvwriljxuhv LVWRI7DEOHV General Power Supply VersionsOverview VersionsApplications ASM-10/8 Point-to-Point ApplicationFeatures Transmission Range Speed 19 AWG 24 AWG 26 AWGPhysical Description ASM-10/8 Standalone UnitFunctional Description Receiver Remote Power Failure RPF Indication Diagnostics ASM-10/8 Block Diagram 6shows the ASM-10/8 internal circuitryTechnical Specifications LineEnvironment Package Contents Site Requirements and PrerequisitesTo complete the installation of ASM 10/8 Installation and SetupSetting Internal JumpersOpening the ASM-10/8 Case Setting the Internal Jumpers and SwitchesTo open the ASM-10/8 case Dbm Jumper Description Values Default Setting600 300 150 300 High Msec Msec8 msec Data Rate Selects the data rate 14.4Setting AGC and CTS Delay Configuration ConsiderationsNo of bits Setting the V.54 Delay Setting the Async Character LengthStart Bit Data Bits Parity Stop Bit No of Bits Connecting the DTE Connecting the PowerKdswhu 2SHUDWLRQ $60IURQWSDQHOLQGLFDWRUVDQGFRQWUROV2SHUDWLQJ,QVWUXFWLRQV VrxufhKdswhu Lqwhuidfh ³ 7RDFWLYDWHWKH5HPRWHLJLWDO/RRSEDFN LJXUH5HPRWHLJLWDO/RRSEDFNLJXUH/RFDOLJLWDO/RRSEDFN ³ 7RSHUIRUPWKH/RFDOLJLWDO/RRSEDFN Kdswhu DUG&DJH9HUVLRQ 6HFWLRQGHVFULEHVKRZWRLQVWDOO$605$605&DUG9HUVLRQ 3RZHU6XSSO\ RU9$ 6XSSO\ VkrxogerwkoljkwzkhqpdlqvsrzhulvsurylghgDQG7DEOHLQ&KDSWHU RxwohwKDSWHU&DUG&DJH9HUVLRQ $SSHQGL$ Rqqhfwrululqj 7DEOH$7,QWHUIDFH3LQ$VVLJQPHQWV7DEOH$7,QWHUIDFH3LQ$VVLJQPHQWV&RQW 7HVW&RPPDQGUdfn LVFRQQHFW$&SRZHUEHIRUHRSHQLQJWKHXQLW Duqlqj³ 7RLQVWDOODVLQJOHXQLW LJXUH%,QVWDOODWLRQRID6LQJOH8QLW UDFNVHHLJXUH%LJXUH%,QVWDOODWLRQRI7ZR8QLWV ³ 7RLQVWDOOWZRXQLWV VfuhzvvxssolhgLJXUH%DVWHQLQJ7ZR8QLWV7RJHWKHU

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