Sony AR-B1570 manual Printer Control Latch & Printer Control Swapper, Bit’s Definition

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AR-B1570 Users Guide

Bit 7: This signal may become active during data entry, when the printer is off-line during printing, or when the print head is changing position or in an error state. When Bit 7 is active, the printer is busy and cannot accept data.

Bit 6: This bit represents the current state of the printer’s ACK signal. A0 means the printer has received the character and is ready to accept another. Normally, this signal will be active for approximately 5 microseconds before receiving a BUSY message stops.

Bit 5: A1 means the printer has detected the end of the paper.

Bit 4: A1 means the printer is selected.

Bit 3: A0 means the printer has encountered an error condition.

(5) Printer Control Latch & Printer Control Swapper

The system microprocessor can read the contents of the printer control latch by reading the address of printer control swapper. Bit definitions are as follows:

7 6 5 4 3 2 1 0 X X

STROBE

AUTO FD XT INIT

SLDC IN IRQ ENABLE DIR(write only)

Bit’s Definition

NOTE: X presents not used.

Direction control bit. When logic 1, the output buffers in the parallel port are disabled allowing data driven

Bit 5: from external sources to be read; when logic 0, they work as a printer port. This bit is write only.

Bit 4: A1 in this position allows an interrupt to occur when ACK changes from low state to high state.

Bit 3: A1 in this bit position selects the printer.

Bit 2: A0 starts the printer (50 microseconds pulse, minimum).

Bit 1: A1 causes the printer to line-feed after a line is printed.

Bit 0: A0.5 microsecond minimum highly active pulse clocks data into the printer. Valid data must be present for a minimum of 0.5 microseconds before and after the strobe pulse.

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Contents Industrial Grade CPU Board AR-B1570 User’s Guide Save & Exit Setup Exit Without Saving Preface Organization Static Electricity PrecautionsCPU NS Geode GX1 BGA 1SPECIFICATIONOverview Packing ListFeatures Award BiosCPU NS Geode GX1 System Controller MicroprocessorDMA Controller Keyboard Controller Interrupt ControllerInterrupt Controller Port Address Map 1 I/O Port Address MapHex Range Device SSDReal-Time Clock & Non-Volatile RAM TimerReal-Time Clock and Non-Volatile RAM Address DescriptionSerial Port Divisor Latch LS, MS Modem Control Register MCRLine Status Register LSR Modem Status Register MSRData Swapper Parallel PortRegister Address Printer Interface LogicBit’s Definition Printer Control Latch & Printer Control SwapperExternal System Location Setting UP the SystemSystem Setting OverviewPin Signal Hard Disk IDE ConnectorPin Hard Disk IDE Connector CN8 Pin Hard Disk IDE Connector CN7FDD Port Connector CN3 Hard Disk IDE1 ConnectorFDD Pin Assignment PS-ON Header CN9 Ethernet RJ-45 Connector LAN14 PS/2 KB/Mouse Connector CN4 & PS1 Reset Header J7P4 CRT Connector Power Connector PWR2CRT Connector P4 LCD Panel Display Connector LCD1Pin Description USB ConnectorUSB1LED Header J8 LCD Display Pin Assignment13 PC104 Connector Pin PC/104 Connector Bus a & B PC104Pin PC/104 Connector Bus C & D PC104 15 IR. Header J1 Parallel Port Connector CN216 Ext. Battery CN1 Battery Jumper JP2RS-485 Terminator Select J2 RS-232 Connector Pin Assignment18 COM1, COM2 CN5, CN6 RS-232/RS-485 Select for COM1 P2 & P3Touch Screen Connector J3 & J4 ATX Power External Bottom Connector J620 D.O.C. Memory Address Select JP1 Installation Driver InstallationUtility Diskette Watchdog Timer Watchdog Block DiagramDisk Watchdog Timer Setting Watchdog Timer TriggerIRQ Bios Console Bios Setup OverviewBios Setup Main Menu Floppy Setup Standard Cmos SetupDate & Time Setup Hard Disk SetupHalt On EGA/VGAMono Bios Features Setup Memory Parity Check Typematic Rate SettingTypematic Delay Msec Video Bios ShadowSdram CAS latency Time Chipset Features SetupBit I/O Cycle Recovery Time Chipset Features SetupLoad Setup Defaults PNP/PCI ConfigurationLoad Default Setting Load Bios DefaultsIntegrated Peripherals Password Setting Bios ExitIDE HDD Auto Detection