Dell |
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| Table 12. | Power Management Features | |
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| |
| Feature | Type | Enable/Status/ | Description | |
|
|
| Ctrl bit |
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|
| location |
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|
| ACPI mode | Fixed | PCH |
| The OS uses the SCI_EN bit to switch from legacy mode to |
| switch |
|
|
| ACPI mode. |
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|
|
|
| Sleep states | Fixed | PCH |
| Supported states: S0(Working), |
|
|
|
|
| and S5 |
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|
|
| S1 (also called ‗standby‘ or ‗suspend‘) and S3 are not |
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|
|
|
| supported. |
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|
|
|
|
| Power Button | Fixed | PCH |
| In ACPI mode, OS has control of the power button. In non- |
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| ACPI mode, SMI handler owns power button events. |
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|
|
|
| Fixed | PCH |
| The OS is able to configure the system to wake on the RTC | |
| Clock |
|
|
| alarm. |
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|
| Power Mgmt. | Fixed | PCH |
| |
| Timer |
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| Power Mgmt. | Generic | PCH |
| Each host bus‘s PME# signal is routed to a separate general- |
| Event (PME) |
|
|
| purpose event pin in the chipset. When a device signals PME#, |
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| the system wakes (if necessary), the OS detects the event, |
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| and a |
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| LAN is one example of a PME. |
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| USB wake | Generic | N/A |
| This feature is not supported on this system since the S1 state |
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| is not supported. |
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|
| DBS | N/A | Processor MSRs |
| This feature does P state transition under Windows |
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|
| C State | N/A | Processor and |
| This feature allows multiple C state supports for Processor. |
| Support |
| PCH registers |
| This feature will work under Windows and ACPI OS that |
|
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|
| understand C states. |
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|
| Power Profile | N/A | Processor/IMC |
| In addition to P,C and T states, BIOS will expose the Power |
| support |
| and PCH |
| Profiles to the OS. Each Power profile will have a specific |
|
|
| chipset |
| settings and it will fine tune processor, MCH, IOH and South |
|
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| registers |
| Bridge. |
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34
PowerEdge R210 II Technical Guide