Maxtor 2R015H1, 2R010H1 specifications Initiating an Ultra DMA Data Out Burst

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AT INTERFACE DESCRIPTION

DMARQ
(device)
tUI
DMACK-
(host)
tACK	tENV
STOP
(host)
tZIORDY	tLI	tUI
DDMARDY-
(device)
tACK
HSTROBE
(host)
DD(15:0)	tDVS	tDVH
DD(15:0)
(host)
tACK
DA0, DA1, DA2,
CS0-, CS1-

HSTROBE

at host

DD(15:0)

at host

Figure 5 - 9

Initiating an Ultra DMA Data Out Burst

		t2CYC
	tCYC		tCYC
			t2CYC
tDVH	tDVS	tDVH	tDVH
	tDVS		tDVS

HSTROBE

at device

DD(15:0) at device

tDH

tDS

tDH

tDS

tDH

Figure 5 - 10

Sustained Ultra DMA Data Out Burst

5 – 8

Image 32

Contents Hard Disk Drive Specifications Models 2R015H1 & 2R010H1 Before You Begin U T I O NContents Product Specifications Handling and InstallationHost Software Interface Interface CommandsAT Interface Description Service and Support GlossaryFigures Introduction MaxtorCorporationManualOrganization AbbreviationsConventions Key Features Product DescriptionProduct Features Functional / InterfaceCacheManagement Major HDA Components Cylinder Limitation Jumper Description SubsystemConfigurationJumper Location / Configuration ProductSpecifications Drive ConfigurationPerformanceSpecifications Models and CapacitiesPhysical Dimensions PowerRequirements Power Mode DefinitionsEPA Energy Star Compliance Environmental LimitsReliability Specifications Shock and VibrationSafety Regulatory Compliance EMC/EMIElectro-StaticDischargeESD HandlingandInstallationHardDriveHandlingPrecautions UnpackingandInspection Multi-pack Shipping ContainerPhysicalInstallation RepackingBefore You Begin Hook upSet up Start upInterfaceConnector ATInterfaceDescriptionPinDescriptionSummary PIN IGN ALPIN Name Signal Name Signal Desc Ription Pin Description TableIM in G Paramet ERS Mode PIO TimingImin G Paramet ERS Mode DMATimingUltra DMA Timing ModeSustained Ultra DMA Data In Burst Device Terminating an Ultra DMA Data In Burst Initiating an Ultra DMA Data Out Burst Device Pausing an Ultra DMA Data Out Burst Device Terminating an Ultra DMA Data Out Burst POR T EAD WR ITE HostSoftwareInterfaceTask File Registers Conten TS LBA Bits CommandRegister Seek, Format, and Diagnostic CommandsSummary M M a N D N a M E M M a N D code PA R a M E T E R S U S E DControl Diagnostic Registers Reset and Interrupt Handling InterfaceCommands ReadCommands Read DMA WriteCommands Write Multiple LE VE L ModeSet/CheckCommandsVAL UE DES C RIP Tion VAL UE Omman D PowerModeCommands Timer VAL UE TIME-OUT PeriodSleep Mode InitializationCommands Or D ENT Desc RiptionOr D 15- 10, as c urrently defined Initialize Drive Parameters Seek,FormatandDiagnosticCommands ER ROR Code Desc RiptionA.R.T. CommandSet Key RegisterServiceandSupport Service PolicyNo Quibble Service Product SupportFrom Dial Glossary Correctable error Central processing unit CPUChannel CharacterDirect access Direct memory access DMAError correction code ECC Error freeHard error Head disk assembly HDAFrequency response Gigabyte GBLate window LatencyLogic Logical addressPhase locked loop PLL Phase marginRandom access memory RAM Read gate signalSector pulse signal Seek complete signalSequential access Soft errorStrobe offset signal Un-correctable errorUnrecoverable error Write gate signal