Maxtor 2R015H1, 2R010H1 specifications CacheManagement

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PRODUCT DESCRIPTION

Defect Management Zone (DMZ)

Each drive model has a fixed number of spare sectors per drive, all of which are located at the end of the drive. Upon detection of a bad sector that has been reassigned, the next sequential sector is used.

For example, if sector 3 is flagged, data that would have been stored there is “pushed down” and recorded in sector 4. Sector 4 then effectively becomes sector 3, as sequential sectors are “pushed down” across the entire drive. The first spare sector makes up for the loss of sector 3, and so maintains the sequential order of data. This push down method assures maximum performance.

On-the-Fly Hardware Error Correction Code (ECC)

14 symbols, single burst, guaranteed.

Software ECC Correction

24 symbols, single burst, guaranteed.

Automatic Park and Lock Operation

Immediately following power down, dynamic braking of the spinning disks delays momentarily allowing the read/write heads to move to an inner mechanical stop. A small fixed magnet holds the rotary actuator in place as the disk spins down. The rotary actuator is released only when power is again applied.

CacheManagement

Buffer Segmentation

The data buffer is organized into two segments: the data buffer and the micro controller scratch pad. The data buffer is dynamically allocated for read and write data depending on the commands received. A variable number of read and write buffers may exist at the same time.

Read-Ahead Mode

Normally, this mode is active. Following a read request, disk read-ahead begins on the first sector and continues sequentially until the allocated buffer is full. If a read request is received during the read-ahead operation, the buffer is examined to determine if the request is in the cache. If a cache hit occurs, read- ahead mode continues without interruption and the host transfer begins immediately.

Automatic Write Reallocation (AWR)

This feature is part of the write cache and reduces the risk of data loss during deferred write operations. If a disk error occurs during the disk write process, the disk task stops and the suspect sector is reallocated to a pool of alternate sectors located at the end of the drive. Following reallocation, the disk write task continues until it is complete.

Write Cache Stacking

Normally, this mode is active. Write cache mode accepts the host write data into the buffer until the buffer is full or the host transfer is complete. A command complete interrupt is generated at the end of the transfer.

A disk write task begins to store the host data to disk. Host write commands continue to be accepted and data transferred to the buffer until either the write command stack is full or the data buffer is full. The drive may reorder write commands to optimize drive throughput.

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Contents Hard Disk Drive Specifications Models 2R015H1 & 2R010H1 Before You Begin U T I O NContents Product Specifications Handling and InstallationInterface Commands AT Interface DescriptionHost Software Interface Service and Support GlossaryFigures Introduction MaxtorCorporationManualOrganization AbbreviationsConventions Key Features Product DescriptionProduct Features Functional / InterfaceCacheManagement Major HDA Components SubsystemConfiguration Jumper Location / ConfigurationCylinder Limitation Jumper Description ProductSpecifications Drive ConfigurationPerformanceSpecifications Models and CapacitiesPhysical Dimensions PowerRequirements Power Mode DefinitionsEPA Energy Star Compliance Environmental LimitsReliability Specifications Shock and VibrationSafety Regulatory Compliance EMC/EMIHandlingandInstallation HardDriveHandlingPrecautionsElectro-StaticDischargeESD UnpackingandInspection Multi-pack Shipping ContainerPhysicalInstallation RepackingBefore You Begin Hook upSet up Start upInterfaceConnector ATInterfaceDescriptionPinDescriptionSummary PIN IGN ALPIN Name Signal Name Signal Desc Ription Pin Description TableIM in G Paramet ERS Mode PIO TimingImin G Paramet ERS Mode DMATimingUltra DMA Timing ModeSustained Ultra DMA Data In Burst Device Terminating an Ultra DMA Data In Burst Initiating an Ultra DMA Data Out Burst Device Pausing an Ultra DMA Data Out Burst Device Terminating an Ultra DMA Data Out Burst HostSoftwareInterface Task File RegistersPOR T EAD WR ITE Conten TS LBA Bits CommandRegister Seek, Format, and Diagnostic CommandsSummary M M a N D N a M E M M a N D code PA R a M E T E R S U S E DControl Diagnostic Registers Reset and Interrupt Handling InterfaceCommands ReadCommands Read DMA WriteCommands Write Multiple ModeSet/CheckCommands VAL UE DES C RIP TionLE VE L VAL UE Omman D PowerModeCommands Timer VAL UE TIME-OUT PeriodSleep Mode InitializationCommands Or D ENT Desc RiptionOr D 15- 10, as c urrently defined Initialize Drive Parameters Seek,FormatandDiagnosticCommands ER ROR Code Desc RiptionA.R.T. CommandSet Key RegisterServiceandSupport Service PolicyNo Quibble Service Product SupportFrom Dial Glossary Correctable error Central processing unit CPUChannel CharacterDirect access Direct memory access DMAError correction code ECC Error freeHard error Head disk assembly HDAFrequency response Gigabyte GBLate window LatencyLogic Logical addressPhase locked loop PLL Phase marginRandom access memory RAM Read gate signalSector pulse signal Seek complete signalSequential access Soft errorStrobe offset signal Un-correctable errorUnrecoverable error Write gate signal
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