Measurement Specialties PCI-QUAD-AC5 manual Block Diagram, Decode/Status

PCI-QUAD-AC5 User's Guide Introducing the PCI-QUAD-AC5

Block Diagram

PCI-QUAD-AC5 functions are illustrated in the block diagram shown here.

		A(7:0)
AC/DC			Port A
	PB24-SSR	C(7:0)		Control
		B(7:0)	Port B
			Port C

Control

Bus

I/O Module

Racks

		A(7:0)
AC/DC	PB24	B(7:0)
	SSR-		C(7:0)

	PB24	A(7:0)
AC/DC		B(7:0)
	SSR-	C(7:0)

Port A	Control
Port B
Port C

Port A	Control
Port B
Port C

Controller FPGA and Logic

Decode/Status

Bus

Timing

Local Bus

I/O Module

Racks

		A(7:0)
AC/DC	PB24	B(7:0)
	SSR-		C(7:0)

Port A

Port B

Port C

Control

Boot	PCI	BADR2
EEPROM	Controller

PCI Bus (5V, 32-BIT, 33MHZ)

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