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| CY7C1370DV25 | ||
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| CY7C1372DV25 | ||
Logic Block |
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| A0, A1, A | ADDRESS |
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| REGISTER 0 | A1 | D1 | Q1 A1' |
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| MODE |
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| A0 | D0 BURST Q0 A0' |
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| ADV/LD | LOGIC |
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CLK | C |
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| C |
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CEN |
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| WRITE ADDRESS |
| WRITE ADDRESS |
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| REGISTER 1 |
| REGISTER 2 |
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| O |
| O |
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| U |
| U |
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| T |
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| ADV/LD |
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| S | P | D | P |
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| E | U | A | U |
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| WRITE REGISTRY |
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| N | T | T | T |
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| MEMORY | S | R | A | B |
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| BWa |
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| AND DATA COHERENCY |
| WRITE | E |
| DQs | |||
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| ARRAY |
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| CONTROL LOGIC |
| DRIVERS | A | G | DQPa | |||
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| T | F | |||||
| BWb |
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| M | I | E | F | DQPb |
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| P | S | E | E | |
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| S | R | R |
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| E | I | S |
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| WE |
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| R | N |
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| S |
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| G |
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| INPUT | E |
| INPUT | E |
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| REGISTER 1 |
| REGISTER 0 |
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| OE |
| READ LOGIC |
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| CE1 |
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| CE2 |
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| CE3 |
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| ZZ |
| Sleep |
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| Control |
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Selection Guide
| 250 MHz | 200 MHz | 167 MHz | Unit |
Maximum Access Time | 2.6 | 3.0 | 3.4 | ns |
Maximum Operating Current | 350 | 300 | 275 | mA |
Maximum CMOS Standby Current | 70 | 70 | 70 | mA |
Document #: | Page 2 of 27 |
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