Chapter 4
Functional Description
PCI-DAS64/M2/16 block diagram
The
!32 differential or 64
!Two
!32 digital I/O channels
!One
|
|
|
|
|
|
|
|
|
|
|
| Queue |
| ADC | DAC 0/1 | 32K x 16 |
|
|
|
|
|
|
|
|
|
|
|
| |
|
|
| Gain and Offset Autocal |
|
|
|
| Buffer |
| Buffer | Buffer |
|
|
|
| Gain and Offset Autocal |
|
|
| ||||||||||
|
|
|
|
|
|
|
|
| Holding | (8K) |
| (8K) | (16K) | SRAM |
|
|
|
|
|
|
|
|
| D/A OUT0 | |||||
|
|
|
|
|
|
|
|
|
| REG |
|
|
|
|
|
|
|
|
|
| DAC0 |
|
| ||||||
|
|
| Mux |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| ||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| ||
Analog In | & |
|
|
|
|
|
|
|
|
| Memory Bus |
|
|
|
|
|
|
|
|
|
|
|
| ||||||
|
|
| ADC |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| D/A OUT1 | ||||||||
|
| Gain |
| EOC |
|
|
|
|
|
|
|
|
|
|
|
| DAC1 |
|
|
|
| ||||||||
|
|
| 2 MHz |
|
|
|
|
|
|
|
|
|
|
|
|
|
| ||||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| 16 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
TRIG_LO TRIG_HI
Analog
Trigger
A/D Start/Stop Trigger
A/D Pacer Gate
A/D External Pacer
SSH Out |
|
| |||
A/D Internal Pacer Out |
|
| |||
|
|
|
| ||
FIRSTPORTA (7:0) |
|
| PortA | Control | |
| |||||
|
|
|
|
| |
FIRSTPORTB (7:0) |
|
|
| PortB | |
|
|
|
FIRSTPORTC (7:0) PortC
DIN (3:0) Inputs
DOUT (3:0) Outputs
|
|
|
| STC |
|
|
|
|
|
|
|
|
| ADC | Memory | DAC |
|
|
|
| External D/A Trigger/Pacer Gate |
|
|
| CNTL |
|
|
|
| |||
|
|
|
|
|
|
|
| |||
|
|
|
| CNTL | CNTL |
|
|
|
| D/A External Pacer In |
|
|
| Trigger |
|
|
|
|
|
|
|
|
|
| CNTL |
| DAC |
|
|
|
| DAC Pacer Out |
|
|
|
|
|
|
|
|
| ||
|
|
| ADC | Queue | Pacer |
|
|
|
|
|
|
|
| Pacer | CNTL | DAC RT |
|
|
|
|
|
|
|
| Sample |
|
|
|
|
|
| |
|
|
|
| CNTL |
|
|
|
|
| |
|
|
| CNTL |
|
|
|
|
|
| |
|
|
|
|
|
|
|
|
|
| |
|
|
| Control / | Decoder | DMA IRQ |
|
|
|
| Interrupt In |
40 MHz |
|
| Status | CTRLCTRL |
|
|
|
|
| |
|
|
| Regs |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| Control | 0 |
|
| ||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| User |
| |
|
|
|
|
|
|
|
|
|
|
|
| Local Bus |
|
|
| CNTR |
| ||
|
|
|
|
|
| 16 |
|
|
|
|
|
|
|
|
| ||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| PCI Bridge |
| DMA |
|
|
|
|
|
| CTR1 GATE | ||||
|
|
| Boot |
|
|
| CH0 |
|
|
|
|
|
| ||||||
|
|
| EEPROM |
|
| w/BUS Master |
| DMA |
|
|
|
|
|
| CTR1 CLK | ||||
|
|
|
|
|
|
|
|
|
|
| CH1 |
|
|
|
|
|
| CTR1 OUT | |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
PCI Bus (5V,
Figure 4-1. PCI-DAS64/M2/16 functional bock diagram
Analog inputs
The