National CP3BT26 manual General Description, Block Diagram, May

PRELIMINARY

MAY 2004

CP3BT26 Reprogrammable Connectivity Processor with Bluetooth®, USB, and CAN Interfaces

CP3BT26 Connectivity

1.0General Description

The CP3BT26 connectivity processor combines high perfor- mance with the massive integration needed for embedded Bluetooth applications. A powerful RISC core with on-chip SRAM and Flash memory provides high computing band- width, hardware communications peripherals provide high- I/O bandwidth, and an external bus provides system ex- pandability.

On-chip communications peripherals include: Bluetooth Lower Link Controller, Universal Serial Bus (USB) 1.1 node, CAN, Microwire/Plus, SPI, ACCESS.bus, quad UART, 12-bit A/D converter, and Advanced Audio Interface (AAI). Addi- tional on-chip peripherals include Random Number Gener- ator (RNG), DMA controller, CVSD/PCM conversion module, Timing and Watchdog Unit, Versatile Timer Unit, Multi-Function Timer, and Multi-Input Wake-Up (MIWU) unit.

Bluetooth hand-held devices can be both smaller and lower in cost for maximum consumer appeal. The low voltage and

advanced power-saving modes achieve new design points in the trade-off between battery size and operating time for handheld and portable applications.

In addition to providing the features needed for the next gen- eration of embedded Bluetooth products, the CP3BT26 is backed up by the software resources designers need for rapid time-to-market, including an operating system, Blue- tooth protocol stack implementation, peripheral drivers, ref- erence designs, and an integrated development environment. Combined with a Bluetooth radio transceiver such as National’s LMX5252, the CP3BT26 provides a com- plete Bluetooth system solution.

National Semiconductor offers a complete and industry- proven application development environment for CP3BT26 applications, including the IAR Embedded Workbench, iSYSTEM winIDEA and iC3000 Active Emulator, Bluetooth Development Board, Bluetooth Protocol Stack, and Applica- tion Software.

Processor with Bluetooth and Dual CAN

Block Diagram

					Clock Generator
12 MHz and 32 kHz					PLL and Clock			Power-on-Reset
		Oscillator			Generator
	CR16C		256K Bytes			8K Bytes			32K Bytes
					Flash
							Flash		Static
CPU Core				Program
							Data		RAM
				Memory

CAN 2.0B Controller

	Bluetooth Lower
		Link Controller
RF Interface			1K Byte
			Sequencer RAM
Protocol			4.5K Bytes
Core			Data RAM

Serial

Debug

Interface

Interfaces

Bus

Interface

Unit

DMA

Controller

Peripheral

Bus

Controller

CPU Core Bus

Interrupt		CVSD/PCM
Control
		Converter
Unit
	Peripheral Bus

Power

Manage-

ment

Timing and

Watchdog

Unit

Random

Number

Generator

GPIO	Audio	Microwiire/	Quad UART	ACCESS	Versatile	Muti-Func-	Multi-Input	8-Channel	USB
	Interface	SPI		.bus	Timer Unit	tion Timer	Wake-Up	12-bit ADC

DS202

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TRI-STATE is a registered trademark of National Semiconductor Corporation.

©2004 National Semiconductor Corporation www.national.com