National CP3BT26 manual Stuff Error, Form Error, Bit CRC Error, Acknowledgment Error, Error States

INTERFRAME SPACE

3

8

FRAME

INT

SUSPEND

Bus Idle

TRANSMIT

DATA FRAME OR

OF

ANY FRAME

REMOTE FRAME

START

r

r

r

r

r

r

r

r

r

r

r

r

r

r

r

r

r

r

r

r

r

r d

INT = Intermission	Note:
	d = dominant
Suspend Transmission is only for error passive nodes.
	r = recessive
	DS026

Figure 42.	Interframe Space
19.2.4 Error Types	a receiver, a “dominant” bit during the last bit of End of
Bit Error	Frame does not constitute a frame error.

CP3BT26

A CAN device which is currently transmitting also monitors the bus. If the monitored bit value is different from the trans- mitted bit value, a bit error is detected. However, the recep- tion of a “dominant” bit instead of a “recessive” bit during the transmission of a passive error flag, during the stuffed bit stream of the arbitration field, or during the acknowledge slot is not interpreted as a bit error.

Stuff Error

A stuff error is detected if 6 consecutive bits occur without a state change in a message field encoded with bit stuffing.

Form Error

A form error is detected, if a fixed frame bit (e.g., CRC de- limiter, ACK delimiter) does not have the specified value. For

Bit CRC Error

A CRC error is detected if the remainder from the CRC cal- culation of a received CRC polynomial is non-zero.

Acknowledgment Error

An acknowledgment error is detected whenever a transmit- ting node does not get an acknowledgment from any other node (i.e., when the transmitter does not receive a “domi- nant” bit during the ACK frame).

Error States

The device can be in one of five states with respect to error handling (see Figure 43).

External Reset or

Enable CR16CAN

SYNC
	11 consecutive 'recessive" bits
	received
		(TEC OR REC) > 95				(TEC OR REC) > 127
ERROR				ERROR			ERROR
ACTIVE		(TEC AND REC) < 96	WARNING			(TEC AND REC) < 128	PASSIVE
	128 occurrences of							TEC > 255
	11 consecutive 'recessive" bits						BUS
							OFF
								DS027
		Figure 43. Bus States
Synchronize					the bus communication. This state must also be entered af-
Once the CAN module is enabled, it waits for 11 consecu-					ter waking-up the device using the Multi-Input Wake-Up fea-

tive recessive bits to synchronize with the bus. After that, the	ture. See System Start-Up and Multi-InputWake-Up on
	page 140.
CAN module becomes error active and can participate in

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