CP3BT26

TSEG1

The Time Segment

1 field configures the

 

length of the Time Segment 1 (TSEG1). It is

 

not recommended to configure the time seg-

 

ment 1 to be smaller than 2 time quanta. (see

 

Table 59).

 

 

 

Table 59 Time Segment 1 Settings

 

 

 

 

 

TSEG1[3:0]

 

Length of Time

 

 

(TSEG1)

 

 

 

 

 

 

 

 

0000

 

Not recommended

 

 

 

 

 

0001

 

2 time quanta

 

 

 

 

 

0010

 

3 time quanta

 

 

 

 

 

0011

 

4 time quanta

 

 

 

 

 

0100

 

5 time quanta

 

 

 

 

 

0101

 

6 time quanta

 

 

 

 

 

0110

 

7 time quanta

 

 

 

 

 

0111

 

8 time quanta

 

 

 

 

 

1000

 

9 time quanta

 

 

 

 

 

1001

 

10 time quanta

 

 

 

 

 

1010

 

11 time quanta

 

 

 

 

 

1011

 

12 time quanta

 

 

 

 

 

1100

 

13 time quanta

 

 

 

 

 

1101

 

14 time quanta

 

 

 

 

 

1110

 

15 time quanta

 

 

 

 

 

1111

 

16 time quanta

 

 

 

TSEG2

The Time Segment 2 field specifies the num-

 

ber of time quanta (tq) for phase segment 2

 

(see Table 60).

 

 

 

Table 60 Time Segment 2 Settings

 

 

 

 

 

TSEG2

 

Length of TSEG2

 

 

 

 

 

000

 

1 time quantum

 

 

 

 

 

001

 

2 time quanta

 

 

 

 

 

010

 

3 time quanta

 

 

 

 

 

011

 

4 time quanta

 

 

 

 

 

100

 

5 time quanta

 

 

 

 

 

101

 

6 time quanta

 

 

 

 

 

110

 

7 time quanta

 

 

 

 

 

111

 

8 time quanta

 

 

 

 

19.10.8 Global Mask Register (GMSKB/GMSKX)

The GMSKB and GMSKX registers allow software to global- ly mask, or “don’t care” the incoming extended/standard identifier bits, RTR/XRTR and IDE. Throughout this docu- ment, the GMSKB and GMSKX 16-bit registers are refer- enced as a 32-bit register GMSK.

The following are the bits for the GMSKB register.

15

5

4

3

2

0

GM[28:18]

 

RTR

IDE

 

GM[17:15]

 

 

 

 

 

 

 

 

0

 

 

 

 

 

 

 

 

 

 

 

R/W

 

 

 

 

 

 

 

 

 

The following are the bits for the GMSKX register.

15

1

0

GM[14:0]

 

XRTR

 

 

 

0

 

 

 

 

 

R/W

 

 

 

 

 

For all GMSKB and GMSKX register bits, the following ap- plies:

0 – The incoming identifier bit must match the correspond- ing bit in the message buffer identifier register.

1 – Accept 1 or 0 (“don’t care”) in the incoming ID bit inde- pendent from the corresponding bit in the message buffer ID registers. The corresponding ID bit in the mes- sage buffer will be overwritten by the incoming identifier bits.

When an extended frame is received from the CAN bus, all GMSK bits GM[28:0], IDE, RTR, and XRTR are used to mask the incoming message. In this case, the RTR bit in the GMSK register corresponds to the SRR bit in the message. The XRTR bit in the GMSK register corresponds to the RTR bit in the message.

During the reception of standard frames only the GMSK bits GM[28:18], RTR, and IDE are used. In this case, the GM[28:18] bits in the GMSK register correspond to the ID[10:0] bits in the message.

Global Mask

GM[28:18]

RTR

IDE

GM[17:0]

XRTR

 

 

 

 

 

 

Standard

ID[10:0]

RTR

IDE

Unused

Frame

 

 

 

 

 

 

 

 

 

 

 

Extended

ID[28:18]

SRR

IDE

ID[17:0]

RTR

Frame

 

 

 

 

 

 

 

 

 

 

 

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National CP3BT26 manual TSEG1, TSEG2, Rtr Ide, Xrtr