National CP3BT26 manual Mode 2 Dual Input Capture, Dual-Input Capture Mode

26.2.2Mode 2: Dual Input Capture

Mode 2 is the Dual Input Capture mode, which measures the elapsed time between occurrences of external events, and which also provides a separate general-purpose timer/ counter.

Figure 101 is a block diagram of the Multi-Function Timer configured to operate in Mode 2. The time base of the cap- ture timer depends on Timer/Counter 1, which counts down using the clock selected with the Timer/Counter 1 clock se- lector. The TA and TB pins function as capture inputs. A transition received on the TA pin transfers the timer contents to the TCRA register. Similarly, a transition received on the TB pin transfers the timer contents to the TCRB register. Each input pin can be configured to sense either rising or falling edges.

The TA and TB inputs can be configured to preset the counter to FFFFh on reception of a valid capture event. In this case, the current value of the counter is transferred to the corresponding capture register and then the counter is preset to FFFFh. Using this approach allows software to de- termine the on-time and off-time and period of an external signal with a minimum of CPU overhead.

The values captured in the TCRA register at different times reflect the elapsed time between transitions on the TA pin. The same is true for the TCRB register and the TB pin. The input signal on the TA or TB pin must have a pulse width equal to or greater than one System Clock cycle.

There are three separate interrupts associated with the cap- ture timer, each with its own enable bit and pending bit. The three interrupt events are reception of a transition on the TA pin, reception of a transition on the TB pin, and underflow of the TCNT1 counter. The enable bits for these events are TAIEN, TBIEN, and TCIEN, respectively.

In Mode 2, Timer/Counter 2 (TCNT2) can be used as a sim- ple system timer. The clock counts down using the clock se- lected with the Timer/Counter 2 clock selector. It generates an interrupt upon each underflow if the interrupt is enabled with the TDIEN bit.

Neither Timer/Counter 1 (TCNT1) nor Timer/Counter 2 (TCNT2) can be configured to operate as an external event counter or to operate in the pulse-accumulate mode be- cause the TB input is used as a capture input. Attempting to select one of these configurations will cause one or both counters to stop.

CP3BT26

Timer 1

Clock

Timer 2

Clock

	TAIEN
	TAPND
Capture A
TCRA
Preset
	TAEN
Timer/Counter 1	TCPND
TCNT1	Underflow
Preset	TCIEN
Capture B	TBEN
TCRB
	TBPND

TBIEN

TDPND

Timer/Counter 2
TnCNT2	Underflow

TDIEN

Timer

Interrupt 1

TA

Timer

Interrupt 1

TB

Timer

Interrupt 1

Timer

Interrupt 2

DS085

Figure 101. Dual-Input Capture Mode

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