All of the port registers are byte-wide read/write registers, except for the port data input registers, which are read-only registers. Each register bit controls the function of the cor- responding port pin. For example, PGDIR.2 (bit 2 of the PGDIR register) controls the direction of port pin PG2.

14.1.1Port Alternate Function Register (PxALT)

The PxALT registers control whether the port pins are used for general-purpose I/O or for their alternate function. Each port pin can be controlled independently.

A clear bit in the alternate function register causes the cor- responding pin to be used for general-purpose I/O. In this configuration, the output buffer is controlled by the direction register (PxDIR) and the data output register (PxDOUT). The input buffer is visible to software as the data input reg- ister (PxDIN).

A set bit in the alternate function register (PxALT) causes the corresponding pin to be used for its peripheral I/O func- tion. When the alternate function is selected, the output buffer data and TRI-STATE configuration are controlled by signals from the on-chip peripheral device.

A reset operation clears the port alternate function regis- ters, which initializes the pins as general-purpose I/O ports. This register must be enabled before the corresponding al- ternate function is enabled.

7

0

PxALT

14.1.3Port Data Input Register (PxDIN)

The data input register (PxDIN) is a read-only register that returns the current state on each port pin. The CPU can read this register at any time even when the pin is config- ured as an output.

7

 

0

 

 

PxDIN

 

 

PxDIN

The PxDIN bits indicate the state on the cor-

 

responding port pin.

 

0

Pin is low.

 

1

Pin is high.

14.1.4Port Data Output Register (PxDOUT)

The data output register (PxDOUT) holds the data to be driven on output port pins. In this configuration, writing to the register changes the output value. Reading the register returns the last value written to the register.

A reset operation leaves the register contents unchanged. At power-up, the PxDOUT registers contain unknown val- ues.

7

0

PxDOUT

CP3BT26

PxALT

The PxALT bits control whether the corre-

 

sponding port pins are general-purpose I/O

 

ports or are used for their alternate function by

 

an on-chip peripheral.

 

0

General-purpose I/O selected.

 

1

Alternate function selected.

14.1.2Port Direction Register (PxDIR)

The port direction register (PxDIR) determines whether each port pin is used for input or for output. A clear bit in this register causes the corresponding pin to operate as an in- put, which puts the output buffer in the high-impedance state. A set bit causes the pin to operate as an output, which enables the output buffer.

A reset operation clears the port direction registers, which initializes the pins as inputs.

7

 

0

 

 

PxDIR

 

 

PxDIR

The PxDIR bits select the direction of the cor-

 

responding port pin.

 

0

Input.

 

1

Output.

PxDOUT

The PxDOUT bits hold the data to be driven

 

on pins configured as outputs in general-pur-

 

pose I/O mode.

 

0

Drive the pin low.

 

1

Drive the pin high.

14.1.5Port Weak Pull-Up Register (PxWPU)

The weak pull-up register (PxWPU) determines whether the port pins have a weak pull-up on the output buffer. The pull- up device, if enabled by the register bit, operates in the gen- eral-purpose I/O mode whenever the port output buffer is disabled. In the alternate function mode, the pull-ups are al- ways disabled.

A reset operation clears the port weak pull-up registers, which disables all pull-ups.

7

 

0

 

 

PxWPU

 

 

PxWPU

The PxWPU bits control whether the weak

 

pull-up is enabled.

 

0

Weak pull-up disabled.

 

1

Weak pull-up enabled.

69

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National CP3BT26 Port Alternate Function Register PxALT, Port Data Input Register PxDIN, Port Data Output Register PxDOUT