| BIOS Setup Utility |
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| CHIPSET FEATURES SETUP |
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| CHIPSET |
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| Setting | Description |
| Note |
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| FEATURES |
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System BIOS Cacheable
Disabled 
Default
Enabled The ROM area
Video BIOS Cacheable
Disabled 
Default
Enabled The video BIOS
Memory Hole At 15M-16M
Disabled 
Default
Enabled Some interface cards will map their ROM address to this area. If this occurs, select [Enabled] in this field.
CPU Latency Timer
Disabled
Enabled
When enabled this item, the CPU 
cycle will only be deferred after it has Default been held in a “Snoop Stall” for 31
clocks and another ADS# has arrived. When disabled, the CPU cycle will be deferred immediately after the GMCH receives another ADS#.
Delayed Transaction
Disabled
Enabled
The chipset has an embedded 
posted write buffer to support delay Default transactions cycles. Select Enabled to support compliance with PCI
specification version 2.1.
AGP
Graphics
Aperture
Size
64MB Select the size of Accelerated Graphics Default 32MB Port (AGP) aperture. The aperture is a 
portion of the PCI memory address
range dedicated for graphics memory address space. Host cycles that hit the aperture range are forwarded to the AGP without any translation.
Use VGA
BIOS in VBU
Block
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Disabled | If you do not make use of the onboard |
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Enabled | VGA function you can set this item to | Default |
| disabled, this way the VGA BIOS will |
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| not be copied into the bootblock. |
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