Siemens S7-300 appendix Slot for the Simatic Micro Memory Card MMC

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Operating and display elements

2.2 Operating and display elements: CPU 31x

Slot for the SIMATIC Micro Memory Card (MMC)

A SIMATIC Micro Memory Card (MMC) is used as memory module. You can use MMCs as load memory and as portable storage medium.

Note

These CPUs do not have an integrated load memory and thus require an MMC for operation.

Mode selector switch

The mode selector switch is used to set the CPU operating mode.

Table 2-3

Positions of the mode selector switch

 

 

 

Position

Meaning

Description

RUN

RUN mode

The CPU executes the user program.

STOP

STOP mode

The CPU does not execute a user program.

MRES

CPU memory reset

Mode selector switch position with pushbutton function for CPU

 

 

memory reset. A CPU memory reset by means of mode

 

 

selector switch requires a specific sequence of operation.

Reference

CPU operating modes: STEP 7 Online Help.

Information on CPU memory reset: Operating instructions CPU 31xC and CPU31x, Commissioning, Commissioning Modules, CP Memory Reset by means of Mode Selector Switch

Evaluation of the LEDs upon error or diagnostic event: Operating Instructions CPU 31xC and CPU 31x, Test Functions, Diagnostics and Troubleshooting, Diagnostics with the help of Status and Error LEDs

Power supply connection

Each CPU is equipped with a double-pole power supply socket. The connector with screw terminals is inserted into this socket when the CPU is delivered.

2-6

CPU 31xC and CPU 31x, Technical data

Manual, Edition 08/2004, A5E00105475-05

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Contents Edition 08/2004 ManualPreface Safety Guidelines Area of application Purpose of the ManualRequired basic knowledge IiiTick mark ApprovalsCE label StandardsDocumentation classification This manual is part of the S7-300 documentation packageRecycling and Disposal Additional information requiredTable of contents Table of contents Index-1 Tables Retentivity of the RAM Table A-1 XiiOverview Selecting and configuringInformation on Is available Guide to the S7-300 documentation CPU performance Programming Manual From Profibus DP to Profinet Operating and display elements of CPU 31xC Operating and display elements CPU 31xCX11 X12 Slot for the Simatic Micro Memory Card MMC Integrated I/Os of CPU 31xC CPU 314C-2 PtP, for exampleReference Mode selector switchPower supply connection Differences between the CPUsStatus and Error Indicators CPU 31xC LED designation Color MeaningOperating and display elements CPU 312, 314, 315-2 DP Operating and display elements CPUOperating and display elements Mode selector switch is used to set the CPU operating mode Operating and display elements CPU 317-2 DP Use the mode selector switch to set the CPU operating mode Operating and display elements CPU 31x-2 PN/DP Slot for the Simatic Micro Memory Card MMC General status and error displays Status and error displays of the CPUDisplays for the X1 and X2 interfaces CPU 31xC and CPU 31x, Technical data Availability InterfacesMulti-Point Interface MPI PropertiesS7-300 / S7-400 with MPI interface S7-200 19.2 kbps only Devices capable of MPI communicationOperating modes for CPUs with two DP interfaces MPI/DP interface Profibus DP interfaceDevices capable of Profibus DP communication Connecting to Industrial EthernetRequirements See also Devices capable of Profinet PN communicationProperties of Profinet interface Profinet IO SystemDrivers Point to Point PtPTransmission rate Devices capable of PtP communicationSelecting the communication service Communication servicesOverview of communication services Overview of communication servicesOP communication PG communicationData exchanged by means of S7 basic communication 5 S7 communication Use in server mode forConfiguration Use as clientReduction ratio Global data communication MPI onlySend and receive conditions CPU 315-2 DP RoutingGD resources of the CPUs 315-2 PN/DPRouting network nodes MPI DP 2 DP Routing network nodes MPI DP EthernetNumber of routed connections 317-2 PN/DPRequirements Configuration in Step Real installationRouting Example of a TeleService application PtP communication Communication via Profinet only CPU 31x-2 PN/DP What is PROFINET??Data consistency With PUT/GET functionsObjectives in Profinet What is Profinet CBA Component based Automation?Implementation of Profinet by us Further Information Extent of Profinet CBA and Profinet IO,2DWD9LHZ 352,17,2 Following graphic shows the new functions of Profinet IO Profinet IO System Extended Functions of Profinet IOGraphic displays Compatibility of the New Blocks Blocks in Profinet IO Chapter ContentProfinet PN Blocks NewDetailed Information Compatibility of the new SSLs System status lists SSLs in Profinet IO Chapter ContentApplicability Open communication via Industrial Ethernet Requirements How to use open IE communicationData block for the configuration of the connection FunctionalityData exchange DisconnectingEstablishing a connection for communication Communication interruptionsS7 connections Snmp communication service Availability1 S7 connection as communication path Connection points Reservation during configurationAssignment of S7 connections Transition pointTime sequence for allocation of S7 connection resources Allocating connection resources to Ocms servicesAssigning connections in the program ExampleDistribution and availability of S7 connection resources Communication service DistributionDistribution of connection resources S7 basic Availability of connection resourcesTotal number Reserved for Free Connection S7 connections ResourcesExample of a CPU 314C-2 DP Connection resources for routingNumber of connection resources for routing Example for a CPU 317-2 PN/DPDefinition DPV1 Requirement for using the DPV1 functionality with DP slavesDPV1 Extended functions of DPV1Profibus DP Interrupt blocks with DPV1 functionalitySystem blocks with DPV1 functionality FunctionalityCommunication 3.4 DPV1 Three memory areas of your CPU Memory areas and retentivityCPU memory areas Load memoryRAM Retentivity of the load memory, system memory and RAMSystem memory Retentive data in load memoryRetentive behavior of memory objects Retentivity of memory objectsRetentive data in RAM Retentive behavior of a DB for CPUs with firmwareRetentive behavior of a DB for CPUs with firmware = RUN-STOPProcess image Address areas of system memoryAddress areas of system memory Address areas DescriptionProcess image update TimeConfigurable process image with CPU317 FW V2.3.0 or higher Local data Retentivity of the load memory, system memory and RAMMMC as memory module for the CPU Properties of the Micro Memory Card MMCProperties of an MMC MMC copy protection Useful life of an MMCLoading user program from Micro Memory Card MMC to the CPU Memory functionsGeneral Memory functions Memory functionsDownload of new blocks or delta downloads Handling with modulesUploading blocks Deleting blocks CPU memory reset and restartCPU memory reset Compressing blocksRestart warm start Processing sequence RecipesIntroduction Recipe Recipe nMemory concept Memory functions Measured values Measured value log filesWorking memory Evaluation of measured values Backup of project data to a Micro Memory Card MMC Function principleMemory concept Memory functions Reference Cycle time OverviewReference Execution time Meaning of the term cycle time Cycle timeOverview Time slice modelTime slices 1 ms each Sequence of cyclic program processingStep Sequence Extending the cycle time Process image update Calculating the cycle timeConst Portions CPU Extending the user program processing time+ 60 μs per rack FactorWatchdog Process Diagnostic Time-of-dayCycle control at the scan cycle check point CCP InterruptDifferent cycle times Extension of the cycle time due to errorProgramming errors Access errors Block processing times may fluctuateExample 20 % communication load Communication loadMaximum cycle time Example 50 % communication loadInfluence on the physical cycle time Physical cycle time depending on communication loadTips Runtimes Configuration during parameter assignmentCycle extension through component-based automation CBA Extending the OB1 cycle timeProfibus Base load through Profibus devices Additional marginal conditionsTips and notes Definition of response time Update times for Profinet IOResponse time Fluctuation widthDP cycle times in the Profibus DP network 17 msCalculation Shortest response timeConditions for the shortest response time Shortest response time is the sumLongest response time Delay of inputs + DP cycle time at Profibus DPDelay of outputs + DP cycle time at Profibus DP Conditions for the longest response timeLongest response time is the sum Reducing the response time with direct I/O accessReducing the response time Shortest response time Longest response timeCycle time Calculating method for calculating the cycle/response timeCycle extension through component-based automation CBA Response time Shortest response time Longest response timeInterrupt response time Process/diagnostic interrupt response times of the CPUsDefinition of interrupt response time Signal modules Tv 200 μs + 1000 μs x n%Definition of Reproducibility Reproducibility of delay interrupts and watchdog interruptsProcess interrupt processing ReproducibilitySample calculations Example of cycle time calculationSample of response time calculation Calculating the longest response timeCalculation of the longest response time Example of interrupt response time calculation Cycle and reaction times 5.6 Sample calculations Width of CPU General technical dataDimensions of CPU 31xC WidthMaximum number of loadable blocks in the MMC Technical data of the Micro Memory Card MMCPlug-in Simatic Micro Memory Cards Following memory modules are availableTechnical data CPU 312CData areas and their retentivity Technical dataAddress areas I/O S7 signaling functions Technical data AssemblyTesting and commissioning functions Communication functions Interfaces 1st interfaceProgramming Technical data FunctionalityDimensions Integrated functionsTechnical data of CPU 31xC 6.3 CPU 313C CPU 313CTechnical data Timers/counters and their retentivity Technical data Address areas I/O Technical data MPI Technical data Integrated I/O KHz see the Manual Technological FunctionsMemory CPU 313C-2 PtP CPU 313C-2 DP Technical data CPU 313C-2 PtP CPU 313C-2 DP CPU and versionCPU 313C-2 PtP and CPU 313C-2 DP Execution times CPU 313C-2 PtP CPU 313C-2 DPBlocks CPU 313C-2 PtP CPU 313C-2 DP Assembly CPU 313C-2 PtP CPU 313C-2 DPAddress areas I/O CPU 313C-2 PtP CPU 313C-2 DP S7 signaling functions CPU 313C-2 PtP CPU 313C-2 DP Technical data CPU 313C-2 PtP CPU 313C-2 DPTime-of-day CPU 313C-2 PtP CPU 313C-2 DP Interfaces CPU 313C-2 PtP CPU 313C-2 DP 1st interface DP master Point-to-point communication Technical data CPU 313C-2 PtP CPU 313C-2 DP DP slaveGSD file Programming CPU 313C-2 PtP CPU 313C-2 DPDimensions CPU 313C-2 PtP CPU 313C-2 DP Voltages and currents CPU 313C-2 PtP CPU 313C-2 DPMemory CPU 314C-2 PtP CPU 314C-2 DP Technical data CPU 314C-2 PtP CPU 314C-2 DP CPU and versionCPU 314C-2 PtP and CPU 314C-2 DP Execution times CPU 314C-2 PtP CPU 314C-2 DPBlocks CPU 314C-2 PtP CPU 314C-2 DP Assembly CPU 314C-2 PtP CPU 314C-2 DPAddress areas I/O CPU 314C-2 PtP CPU 314C-2 DP S7 signaling functions CPU 314C-2 PtP CPU 314C-2 DP Technical data CPU 314C-2 PtP CPU 314C-2 DPTime-of-day CPU 314C-2 PtP CPU 314C-2 DP Interfaces CPU 314C-2 PtP CPU 314C-2 DP 1st interface 2nd interface CPU 314C-2 PtP CPU 314C-2 DP Programming CPU 314C-2 PtP CPU 314C-2 DP Technical data CPU 314C-2 PtP CPU 314C-2 DP DP slaveIntegrated I/O CPU 314C-2 PtP CPU 314C-2 DP Dimensions CPU 314C-2 PtP CPU 314C-2 DP Voltages and currents CPU 314C-2 PtP CPU 314C-2 DPCPU 312C Pin-out of the integrated DI/DO connector Technical data of the integrated I/OArrangement and usage of integrated I/Os Block diagram of the integrated digital I/O Standard Interrupt Count Posi-1 Input Tioning 1L+ 2L+ Controller See also Wiring of the current/voltage inputs Analog I/OMeasurement principle Maximum frequency of the input signal is 400 HzIntegrated hardware low-pass filter Input filters software filter Principle of interference suppression with Step50 Hz interference suppression Inputs not connected Outputs not connectedValue range Default Range of efficiency ConfigurationParameters of standard DI Byte 6 ByteByte 3 reserved Byte 7 reservedThere are no parameters for standard digital outputs Parameters of standard doParameters of standard AI See also .3 in the Module Data Reference ManualParameters Value range Default Range of efficiency Parameters of standard AO\WH  \WH \WH  \WH \WH  Parameter for technological functions\WH  Start information for OB40 InterruptsInterrupt inputs Byte Variables Data type DescriptionStandard I/O DiagnosticsDigital inputs Technological functionsFunctions Manual Fast digital outputs Digital outputsTechnological functions use fast digital outputs 13 Technical data of digital outputs CPU 31xC and CPU 31x, Technical data Voltage, currents, potentials Technical data Module-specific dataAnalog inputs Analog value generationStatus, interrupts, diagnostics Interference suppression, error limitsEncoder selection data Analog outputs Actuator selection data Technical data of CPU 31xC CPU 31xC and CPU 31x, Technical data Technical data of CPU Dimensions of CPUTechnical data of CPU 31x 7.1 General technical data CPU Technical data Data areas and their retentivity Technical data Technical data Communication functions Mounting dimensions W x H x D mm 40 x 125 x Weight 270 g Technical data for the CPU Technical data Data areas and their retentivity Technical data Number of entries not configurable Max Mounting dimensions W x H x D mm 40 x 125 x Weight 280 g CPU 315-2 DP Technical data Data areas and their retentivity Technical data Diagnostic buffer Yes Number of entries not configurable Max 2nd interface Technical data DP slave CPU 315-2 PN/DP Technical data Technical data Assembly Parameters of SFBs/FBs and SFC/FC of the S7 CBA at 50 % communication load Transmission speed Up to 12 Mbps Number of DP slaves 124 Profinet IO Technical data Voltages and currents CPU 317-2 DPTechnical data Timers/counters and their retentivity Technical data Technical data S7 signaling functions CPU 317-2 DPMPI DP slave Except for DP slave at both interfaces GSD file CPU 317-2 PN/DP Technical data Analog channels 4096/4096 Those local 256/256 Communication functions Routing Interface X1 configured as Yes MPI Profinet IO Technical data Voltages and currents Who should read this information? Information about upgrading to a CPU 31xC or CPUArea of applicability If you have used one of the following CPUs in the pastDPV1 Changed behavior of certain SFCsSFC 56, SFC 57 and SFC 13 which work asynchronously Hereafter calledSFC 20 Blkmov SFC 54 RddparmPrevious response by the CPU with Stop status SFCs that may return other resultsActivating / deactivating DP slaves via SFC New response by the CPURuntimes that change while the program is running Converting the diagnostic addresses of DP slavesConverting the diagnostic addresses of DP slaves Runtimes that change while the program is runningReplacing a CPU 31xC/31x Reusing existing hardware configurationsReusing existing hardware configurations Replacing a CPU 31xC/31xConsistent data 10 PG/OP functions Load memory concept for the CPU 31xC/31xRouting for the CPU 31xC/31x as an intelligent slave Changed retentive behavior for CPUs with firmware = Changed retentive behavior for CPUs with firmware =Procedure Asic Bus segment Backup memoryBus Clock flag bitsCPU Determinism Default RouterData, temporary DeviceDPV1 Ertec GD circuit Function blockFunctional ground GD elementIndustrial Ethernet GSD fileHub Instance data blockInterrupt, update Interrupt, delayInterrupt, diagnostic Interrupt, processLAN MPI NCM PCNon-isolated Nesting depthNetwork OB priorityPLC PNOProfibus Profibus DPProfinet CBA ProfinetProfinet Asic Profinet ComponentProfinet IO Reduction factor ProxyReal Time Reference groundSFB SFCSimatic NET SimaticSimatic NCM PC SnmpStep Timers System diagnosticsTimer System functionTwisted Pair TokenTopology UngroundedWAN Glossary-23Glossary-24 Index Index Index-3 Index
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