Siemens S7-300 appendix Operating and display elements CPU

Page 21

Operating and display elements 2.2 Operating and display elements: CPU 31x

2.2Operating and display elements: CPU 31x

2.2.1Operating and display elements: CPU 312, 314, 315-2 DP:

Operating and display elements

6

5

4

 

1

SF

 

BF

 

DC5V

 

FRCE

 

RUN

 

STOP

 

 

RUN

 

STOP

 

MRES

X1

X2

MMC

2

3

The figures show

the following CPU elements

(1)

Slot for the Micro Memory Card (MMC), incl. the ejector

(2)

2. Interface X2 (only for CPU 315-2 DP)

(3)

Power supply connection

(4)

1. Interface X1 (MPI)

(5)

Mode selector switch

(6)

Status and error displays

CPU 31xC and CPU 31x, Technical data

2-5

Manual, Edition 08/2004, A5E00105475-05

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Contents Manual Edition 08/2004Preface Safety Guidelines Required basic knowledge Purpose of the ManualArea of application IiiCE label ApprovalsTick mark StandardsThis manual is part of the S7-300 documentation package Documentation classificationAdditional information required Recycling and DisposalTable of contents Table of contents Index-1 Tables Retentivity of the RAM Xii Table A-1Selecting and configuring OverviewInformation on Is available Guide to the S7-300 documentation CPU performance Programming Manual From Profibus DP to Profinet Operating and display elements CPU 31xC Operating and display elements of CPU 31xCX11 X12 Integrated I/Os of CPU 31xC CPU 314C-2 PtP, for example Slot for the Simatic Micro Memory Card MMCPower supply connection Mode selector switchReference Differences between the CPUsLED designation Color Meaning Status and Error Indicators CPU 31xCOperating and display elements CPU Operating and display elements CPU 312, 314, 315-2 DPOperating and display elements Mode selector switch is used to set the CPU operating mode Operating and display elements CPU 317-2 DP Use the mode selector switch to set the CPU operating mode Operating and display elements CPU 31x-2 PN/DP Slot for the Simatic Micro Memory Card MMC Status and error displays of the CPU General status and error displaysDisplays for the X1 and X2 interfaces CPU 31xC and CPU 31x, Technical data Multi-Point Interface MPI InterfacesAvailability PropertiesOperating modes for CPUs with two DP interfaces Devices capable of MPI communicationS7-300 / S7-400 with MPI interface S7-200 19.2 kbps only MPI/DP interface Profibus DP interfaceConnecting to Industrial Ethernet Devices capable of Profibus DP communicationRequirements Properties of Profinet interface Devices capable of Profinet PN communicationSee also Profinet IO SystemTransmission rate Point to Point PtPDrivers Devices capable of PtP communicationOverview of communication services Communication servicesSelecting the communication service Overview of communication servicesPG communication OP communicationData exchanged by means of S7 basic communication Configuration Use in server mode for5 S7 communication Use as clientGlobal data communication MPI only Reduction ratioSend and receive conditions GD resources of the CPUs RoutingCPU 315-2 DP 315-2 PN/DPRouting network nodes MPI DP Number of routed connections Routing network nodes MPI DP Ethernet2 DP 317-2 PN/DPRequirements Real installation Configuration in StepRouting Example of a TeleService application PtP communication Data consistency What is PROFINET??Communication via Profinet only CPU 31x-2 PN/DP With PUT/GET functionsWhat is Profinet CBA Component based Automation? Objectives in ProfinetImplementation of Profinet by us Extent of Profinet CBA and Profinet IO Further Information,2DWD9LHZ 352,17,2 Profinet IO System Extended Functions of Profinet IO Following graphic shows the new functions of Profinet IOGraphic displays Blocks in Profinet IO Chapter Content Compatibility of the New BlocksProfinet PN New BlocksDetailed Information System status lists SSLs in Profinet IO Chapter Content Compatibility of the new SSLsApplicability Data block for the configuration of the connection How to use open IE communicationOpen communication via Industrial Ethernet Requirements FunctionalityEstablishing a connection for communication DisconnectingData exchange Communication interruptionsSnmp communication service Availability S7 connections1 S7 connection as communication path Assignment of S7 connections Reservation during configurationConnection points Transition pointAssigning connections in the program Allocating connection resources to Ocms servicesTime sequence for allocation of S7 connection resources ExampleCommunication service Distribution Distribution and availability of S7 connection resourcesDistribution of connection resources Total number Reserved for Free Connection S7 connections Availability of connection resourcesS7 basic ResourcesNumber of connection resources for routing Connection resources for routingExample of a CPU 314C-2 DP Example for a CPU 317-2 PN/DPDPV1 Requirement for using the DPV1 functionality with DP slavesDefinition DPV1 Extended functions of DPV1System blocks with DPV1 functionality Interrupt blocks with DPV1 functionalityProfibus DP FunctionalityCommunication 3.4 DPV1 CPU memory areas Memory areas and retentivityThree memory areas of your CPU Load memorySystem memory Retentivity of the load memory, system memory and RAMRAM Retentive data in load memoryRetentive data in RAM Retentivity of memory objectsRetentive behavior of memory objects Retentive behavior of a DB for CPUs with firmwareRUN-STOP Retentive behavior of a DB for CPUs with firmware =Address areas of system memory Address areas of system memoryProcess image Address areas DescriptionTime Process image updateConfigurable process image with CPU317 FW V2.3.0 or higher Retentivity of the load memory, system memory and RAM Local dataProperties of the Micro Memory Card MMC MMC as memory module for the CPUProperties of an MMC Useful life of an MMC MMC copy protectionGeneral Memory functions Memory functionsLoading user program from Micro Memory Card MMC to the CPU Memory functionsHandling with modules Download of new blocks or delta downloadsUploading blocks CPU memory reset CPU memory reset and restartDeleting blocks Compressing blocksRestart warm start Introduction RecipesProcessing sequence Recipe Recipe nMemory concept Memory functions Measured value log files Measured valuesWorking memory Evaluation of measured values Function principle Backup of project data to a Micro Memory Card MMCMemory concept Memory functions Overview Reference Cycle timeReference Execution time Overview Cycle timeMeaning of the term cycle time Time slice modelSequence of cyclic program processing Time slices 1 ms eachStep Sequence Extending the cycle time Calculating the cycle time Process image update+ 60 μs per rack Extending the user program processing timeConst Portions CPU FactorCycle control at the scan cycle check point CCP Process Diagnostic Time-of-dayWatchdog InterruptProgramming errors Access errors Extension of the cycle time due to errorDifferent cycle times Block processing times may fluctuateMaximum cycle time Communication loadExample 20 % communication load Example 50 % communication loadPhysical cycle time depending on communication load Influence on the physical cycle timeTips Cycle extension through component-based automation CBA Configuration during parameter assignmentRuntimes Extending the OB1 cycle timeProfibus Additional marginal conditions Base load through Profibus devicesTips and notes Response time Update times for Profinet IODefinition of response time Fluctuation width17 ms DP cycle times in the Profibus DP networkConditions for the shortest response time Shortest response timeCalculation Shortest response time is the sumDelay of outputs + DP cycle time at Profibus DP Delay of inputs + DP cycle time at Profibus DPLongest response time Conditions for the longest response timeReducing the response time Reducing the response time with direct I/O accessLongest response time is the sum Shortest response time Longest response timeCalculating method for calculating the cycle/response time Cycle timeCycle extension through component-based automation CBA Shortest response time Longest response time Response timeProcess/diagnostic interrupt response times of the CPUs Interrupt response timeDefinition of interrupt response time Tv 200 μs + 1000 μs x n% Signal modulesProcess interrupt processing Reproducibility of delay interrupts and watchdog interruptsDefinition of Reproducibility ReproducibilityExample of cycle time calculation Sample calculationsCalculating the longest response time Sample of response time calculationCalculation of the longest response time Example of interrupt response time calculation Cycle and reaction times 5.6 Sample calculations Dimensions of CPU 31xC General technical dataWidth of CPU WidthPlug-in Simatic Micro Memory Cards Technical data of the Micro Memory Card MMCMaximum number of loadable blocks in the MMC Following memory modules are availableCPU 312C Technical dataTechnical data Data areas and their retentivityAddress areas I/O Technical data Assembly S7 signaling functionsTesting and commissioning functions Interfaces 1st interface Communication functionsDimensions Technical data FunctionalityProgramming Integrated functionsCPU 313C Technical data of CPU 31xC 6.3 CPU 313CTechnical data Timers/counters and their retentivity Technical data Address areas I/O Technical data MPI KHz see the Manual Technological Functions Technical data Integrated I/OCPU 313C-2 PtP and CPU 313C-2 DP Technical data CPU 313C-2 PtP CPU 313C-2 DP CPU and versionMemory CPU 313C-2 PtP CPU 313C-2 DP Execution times CPU 313C-2 PtP CPU 313C-2 DPAssembly CPU 313C-2 PtP CPU 313C-2 DP Blocks CPU 313C-2 PtP CPU 313C-2 DPAddress areas I/O CPU 313C-2 PtP CPU 313C-2 DP Technical data CPU 313C-2 PtP CPU 313C-2 DP S7 signaling functions CPU 313C-2 PtP CPU 313C-2 DPTime-of-day CPU 313C-2 PtP CPU 313C-2 DP Interfaces CPU 313C-2 PtP CPU 313C-2 DP 1st interface DP master GSD file Technical data CPU 313C-2 PtP CPU 313C-2 DP DP slavePoint-to-point communication Programming CPU 313C-2 PtP CPU 313C-2 DPVoltages and currents CPU 313C-2 PtP CPU 313C-2 DP Dimensions CPU 313C-2 PtP CPU 313C-2 DPCPU 314C-2 PtP and CPU 314C-2 DP Technical data CPU 314C-2 PtP CPU 314C-2 DP CPU and versionMemory CPU 314C-2 PtP CPU 314C-2 DP Execution times CPU 314C-2 PtP CPU 314C-2 DPAssembly CPU 314C-2 PtP CPU 314C-2 DP Blocks CPU 314C-2 PtP CPU 314C-2 DPAddress areas I/O CPU 314C-2 PtP CPU 314C-2 DP Technical data CPU 314C-2 PtP CPU 314C-2 DP S7 signaling functions CPU 314C-2 PtP CPU 314C-2 DPTime-of-day CPU 314C-2 PtP CPU 314C-2 DP Interfaces CPU 314C-2 PtP CPU 314C-2 DP 1st interface 2nd interface CPU 314C-2 PtP CPU 314C-2 DP Technical data CPU 314C-2 PtP CPU 314C-2 DP DP slave Programming CPU 314C-2 PtP CPU 314C-2 DPIntegrated I/O CPU 314C-2 PtP CPU 314C-2 DP Voltages and currents CPU 314C-2 PtP CPU 314C-2 DP Dimensions CPU 314C-2 PtP CPU 314C-2 DPTechnical data of the integrated I/O CPU 312C Pin-out of the integrated DI/DO connectorArrangement and usage of integrated I/Os Block diagram of the integrated digital I/O Standard Interrupt Count Posi-1 Input Tioning 1L+ 2L+ Controller See also Analog I/O Wiring of the current/voltage inputsMaximum frequency of the input signal is 400 Hz Measurement principleIntegrated hardware low-pass filter Principle of interference suppression with Step Input filters software filter50 Hz interference suppression Outputs not connected Inputs not connectedConfiguration Value range Default Range of efficiencyParameters of standard DI Byte 3 reserved ByteByte 6 Byte 7 reservedParameters of standard AI Parameters of standard doThere are no parameters for standard digital outputs See also .3 in the Module Data Reference ManualParameters of standard AO Parameters Value range Default Range of efficiency\WH  \WH \WH  \WH Parameter for technological functions \WH \WH  Interrupt inputs InterruptsStart information for OB40 Byte Variables Data type DescriptionDigital inputs DiagnosticsStandard I/O Technological functionsFunctions Manual Digital outputs Fast digital outputsTechnological functions use fast digital outputs 13 Technical data of digital outputs CPU 31xC and CPU 31x, Technical data Analog inputs Technical data Module-specific dataVoltage, currents, potentials Analog value generationInterference suppression, error limits Status, interrupts, diagnosticsEncoder selection data Analog outputs Actuator selection data Technical data of CPU 31xC CPU 31xC and CPU 31x, Technical data Dimensions of CPU Technical data of CPUTechnical data of CPU 31x 7.1 General technical data CPU Technical data Data areas and their retentivity Technical data Technical data Communication functions Mounting dimensions W x H x D mm 40 x 125 x Weight 270 g Technical data for the CPU Technical data Data areas and their retentivity Technical data Number of entries not configurable Max Mounting dimensions W x H x D mm 40 x 125 x Weight 280 g CPU 315-2 DP Technical data Data areas and their retentivity Technical data Diagnostic buffer Yes Number of entries not configurable Max 2nd interface Technical data DP slave CPU 315-2 PN/DP Technical data Technical data Assembly Parameters of SFBs/FBs and SFC/FC of the S7 CBA at 50 % communication load Transmission speed Up to 12 Mbps Number of DP slaves 124 Profinet IO CPU 317-2 DP Technical data Voltages and currentsTechnical data Timers/counters and their retentivity Technical data CPU 317-2 DP Technical data S7 signaling functionsMPI DP slave Except for DP slave at both interfaces GSD file CPU 317-2 PN/DP Technical data Analog channels 4096/4096 Those local 256/256 Communication functions Routing Interface X1 configured as Yes MPI Profinet IO Technical data Voltages and currents Area of applicability Information about upgrading to a CPU 31xC or CPUWho should read this information? If you have used one of the following CPUs in the pastSFC 56, SFC 57 and SFC 13 which work asynchronously Changed behavior of certain SFCsDPV1 Hereafter calledSFC 54 Rddparm SFC 20 BlkmovActivating / deactivating DP slaves via SFC SFCs that may return other resultsPrevious response by the CPU with Stop status New response by the CPUConverting the diagnostic addresses of DP slaves Converting the diagnostic addresses of DP slavesRuntimes that change while the program is running Runtimes that change while the program is runningReusing existing hardware configurations Reusing existing hardware configurationsReplacing a CPU 31xC/31x Replacing a CPU 31xC/31xConsistent data Load memory concept for the CPU 31xC/31x 10 PG/OP functionsRouting for the CPU 31xC/31x as an intelligent slave Changed retentive behavior for CPUs with firmware = Changed retentive behavior for CPUs with firmware =Procedure Asic Bus Backup memoryBus segment Clock flag bitsCPU Data, temporary Default RouterDeterminism DeviceDPV1 Ertec Functional ground Function blockGD circuit GD elementHub GSD fileIndustrial Ethernet Instance data blockInterrupt, diagnostic Interrupt, delayInterrupt, update Interrupt, processLAN NCM PC MPINetwork Nesting depthNon-isolated OB priorityPNO PLCProfibus DP ProfibusProfinet Asic ProfinetProfinet CBA Profinet ComponentProfinet IO Real Time ProxyReduction factor Reference groundSFC SFBSimatic NCM PC SimaticSimatic NET SnmpStep Timer System diagnosticsTimers System functionTopology TokenTwisted Pair UngroundedGlossary-23 WANGlossary-24 Index Index Index-3 Index
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