Clevo D900F ICH10R, Schematic Diagrams, B - 48 Power Sequence Diagram, Tylersberg, Other

Schematic Diagrams

Power Sequence Diagram

Diagrams

Sheet 47 of 47

Power Sequence

Diagram

		11	IOH_CLPWROK	D900F V0.0 BOOT		BLOCK DIAGRAM
	13-1			7a
		PLLDET_3V(COREPLLPWRDET)			MXM_PWR_EN	MXM3.0
1		H_PWRGD_IOH(COREPWRGOOD) NORTH BRIDGE		7b
PWR_SW# Power Bottom	13-3				MXM_PRESNT#

		VR	3V	3	Tylersberg
		VDD3/VDD5					16 H_CPURST#
		LTC3850	5V	3
		LP2951CDR2G	12V	3	17	15	14 PLTRST#(VCCPWRGD)	Other
					IOH_CSI_RST
						PLTRST_DLY#(CORERST#)	Platform
EC	DD_ON	2
			1.5V	3				Devices
ITE8512E		DRAM VR
		SC486	0.75VS	6	SOUTH BRIDGE
	PWR_BTN#	4a					MXM_PRESNT# 7b
DELAY	RSMRST#	4b
DD_ON								Processor
75 ms	SUSC#	5a					13-2H_PWRGD
								Bloomfield
	SUSB#	5b

B.Schematic

	MXM_PWR_EN		7a	11	IOH_CLPWROK
		MXM_PRESNT# 7b
VCORE_ON	9	VCORE VR		11	VRM_PWRGD
VTT_PWRGD	9			12
VCORE	10	NCP5392MNR2G			PWROKICH
			11
		VRM_PWRGD->ICH_VRM_PWRGD
6 3VS	G690L293T73		PM_PWROK
	6			5b	SUSB#
1.1VS		SC412A	6	1.5VS
			6	1.8VS
8			6	3.3VS
CPU_VTT ISL6314CR		1.1V EN	6	5VS
8
VTT_PWRGD

	ICH10R		14	PCIRST#	Devices
					Other PCI
					(NEW Card)
			12-1	CK_PWRGD	Clock Generator
					CV193
	14 PLTRST#	Delay 2ms	15 PLTRST_DLY#(CORERST#)
	11		13-1
	ICH_VRM_PWRGD	2N3904	PLLDET_3V(COREPLLPWRDET)
		Delay	H_PWRGD_IOH(COREPWRGOOD)
MOSFET	Follow Design Guide		13-3

B - 48 Power Sequence Diagram